Methods of forming programmable memory devices comprising...

Details Methods of forming programmable memory devices comprising... Methods of forming programmable memory devices comprising...

2003-04-30

2004-08-17

Le, Dung A. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S258000, C438S259000, C438S593000, C438S594000

Reexamination Certificate

active

06777291

ABSTRACT:

TECHNICAL FIELD
The invention pertains to programmable memory devices, such as, for example, erasable programmable read-only memory (EPROM) devices, electrically erasable programmable read-only (EEPROM) devices, and flash memory devices. The invention also pertains to methods of forming programmable memory devices.
BACKGROUND OF THE INVENTION
Programmable memory devices have numerous applications in modern semiconductor structures. Among the devices which can be particularly useful are EPROM and EEPROM devices, which can store information in read-only format and yet enable the information stored therein to be erased by subjecting the memory devices to appropriate energy. The energy utilized to erase EPROM devices is typically ultraviolet (UV) radiation, whereas the energy utilized to erase EEPROM devices is electrical energy. A flash device is typically an EEPROM device, with the term “flash” indicating that the device can be erased within a time of less than or equal to 2 seconds.
It is desired to develop improved methods for forming programmable read-only memory devices.
SUMMARY OF THE INVENTION
In various aspects, this disclosure describes methods which can allow pure tungsten to be utilized to lower resistance of a wordline while at the same time offering protection from cross-contamination during oxidation steps. The strapping of a wordline with pure tungsten metal can permit reduction of both the overall thickness of a gate stack, and the overall resistance of the wordline. A problem that frequently occurs when pure tungsten metal is utilized in a non-volatile memory (such as flash memory) is that cross-contamination, created during various oxidation steps associated with device fabrication, can degrade the long term data retention properties of the memory cell. This disclosure describes various methods which can be used to encapsulate tungsten during the oxidation steps, while also providing desired stability during a “source rail etch” that can occur prior to one or more of the various oxidation steps.
In one aspect, the invention includes a memory device supported by a semiconductor substrate and comprising in ascending order from the substrate a floating gate, a dielectric material, a layer consisting essentially of tungsten nitride, a first mass consisting essentially of tungsten, and a second mass consisting essentially of one or more nitride compounds.
In one aspect, the invention encompasses a memory device having a floating gate and a dielectric material over the floating gate. The device also includes a mass consisting essentially of tungsten over the dielectric material, with the mass having a pair of opposing sidewalls. A pair of sidewall spacers are along the opposing sidewalls of the mass. The sidewall spacers comprise a first layer consisting essentially of one or more nitride compounds and a second layer different from the first layer.
In one aspect, the invention encompasses a method of making a programmable memory device. A floating gate mass is formed over a semiconductor substrate, and a dielectric material is formed over the floating gate mass. A first layer consisting essentially of tungsten is formed over the dielectric material, and a second layer consisting essentially of one or more nitride compounds is formed over the layer consisting essentially of tungsten. A first gate pattern is formed by etching through the first and second layers. The first gate pattern has sidewalls extending along the etched layers. Sidewall spacers are formed along the sidewalls. While the sidewall spacers are along the sidewalls, a second gate pattern is formed by etching through the dielectric material and the floating gate mass. The first and second gate patterns together are incorporated into a programmable memory device.


REFERENCES:
patent: 6188115 (2001-02-01), Kamitani
patent: 6288419 (2001-09-01), Prall et al.
patent: 6346467 (2002-02-01), Chang et al.
patent: 6383870 (2002-05-01), San et al.
patent: 6429108 (2002-08-01), Chang et al.
patent: 6630392 (2003-10-01), Kim et al.
patent: 6642112 (2003-11-01), Lowe et al.
patent: 2003/0003657 (2003-01-01), Kim et al.

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