Semiconductor device manufacturing method

Details Semiconductor device manufacturing method Semiconductor device manufacturing method

2002-07-30

2004-03-30

Zarneke, David A. (Department: 2829)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S687000, C438S772000, C438S776000

Reexamination Certificate

active

06713383

ABSTRACT:

BACKGROUND OF THE INVENTION
a) Field of the Invention
The present invention relates to a semiconductor device manufacturing method and, more particularly, the technology of preventing diffusion of Cu in a copper (Cu) wiring layer in a multi-layered wiring conductor device.
b) Description of the Prior Art
An LSI is manufactured by connecting transistors, diodes, capacitors, resistors, etc., arranged electrically separate on the semiconductor substrate, via wirings.
The technology for connecting the elements in a high density arrangement is the multi-layered wiring technology, and this multi-layered wiring technology is the important technology in determining performance of the LSI. The parasitic effects of the resistances, the capacitances, etc. in the multi-layered wiring circuit have great influence on the performance of the LSI circuit. Multi-layered wiring circuits currently employ Cu (copper) wiring, which has low resistance, and an interlayer insulating film, which is made of a material having a low dielectric constant, in combination. Manufacturing methods for making such multi-layered circuits currently employ “burying”, i.e., the so-called damascene process.
The Cu in the Cu wiring layer readily diffuses into the interlayer insulating film in the annealing step, or the like. If the Cu in the Cu wiring layer diffuses into the interlayer insulating film, disadvantages such as an increase in the leakage current in the interlayer insulating film are brought about. For this reason, the diffusion of Cu from the Cu wiring layer is prevented by forming a Cu diffusion preventing insulating film such as a silicon nitride film, between the Cu wiring layer and the interlayer insulating film.
However, the dielectric constant (e.g., ∈=5 or so) of an insulating film that can prevent the diffusion of Cu is considerably higher, e.g. ∈=2.8 or so, than that of a low dielectric constant insulating film. Therefore, even if the major part of the interlayer insulating film is formed by an insulating film having a low dielectric constant, the parasitic capacitance between the Cu wiring layers in the multi-layered wiring is effectively increased because of the intervention of the Cu diffusion preventing insulating film. For instance, if the total film thickness of the interlayer insulating film is fixed at 500 nm, if 100 nm is assigned to the thickness of the Cu diffusion preventing insulating film (∈=5 or so) and the remaining thickness is assigned to the insulating film having the low dielectric constant (∈=2.8 or so), the effective dielectric constant of the interlayer insulating film is increased up to about 3.05. As a result, the delay in the electric signal that is propagated in the wiring of the multi-layered wiring in the LSI, i.e., the wiring delay, is increased and it is possible that this delay may cause a fatal problem.
Therefore, reduction of the film thickness of the Cu diffusion preventing insulating film has been considered. However, because of the influence of the step of forming the Cu diffusion preventing insulating film on the Cu wiring layer by the plasma CVD method, the later annealing at about 400 to 450 □{haeck over (Z)}, etc., Cu projections are readily formed at the surface of the Cu wiring layer. Thus, there is the problem that the Cu will diffuse from these projections.
Further, in the prior art, it is difficult to use the insulating film having a low dielectric constant as the Cu diffusion preventing insulating film. As a result, a method of forming an insulating film that has a low dielectric constant and is able to prevent the diffusion of Cu is highly desired.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device manufacturing method capable of reducing capacitance between wiring layers of the multi-layered wiring by preventing formation of projections on a Cu wiring layer to thereby reduce film thickness of a Cu diffusion preventing insulating film and by making it possible to use a low dielectric constant insulating film as the Cu diffusion preventing insulating film.
The present invention provides a semiconductor device manufacturing method which comprises the steps of forming a silicon-containing insulating film on a wiring layer made mainly of a copper (Cu) formed over a semiconductor substrate; and exposing the silicon-containing insulating film to an atmosphere or a plasma of a hydrocarbon (C
x
H
y
) gas.
Therefore, a carbon-containing layer can be formed on the surface of the silicon-containing insulating film. The carbon-containing layer has etching resistance against the gaseous or liquid etchant used to etch the silicon-containing insulating film. As a result, not only a barrier against diffusion of copper from the copper wiring layer but also an etching stopper for the etching of the thick interlayer insulating film can be provided on the silicon-containing insulating film by a simple process.
Also, the present invention provides a semiconductor device manufacturing method which comprises the steps of exposing a surface of a copper (Cu) wiring layer formed over a semiconductor substrate to a plasma of a gas selected from the group consisting of an ammonia gas, a mixed gas of nitrogen and hydrogen, a CF
4
gas, a C
2
F
6
gas and a NF
3
gas; exposing the surface of the copper (Cu) wiring layer to an atmosphere or a plasma of a gas selected from the group consisting of an ammonia gas, an ethylenediamine gas, a &bgr;-diketone gas, a mixed gas consisting of the ammonia gas and a hydrocarbon gas (C
x
H
y
), and a mixed gas consisting of a nitrogen gas and the hydrocarbon gas (C
x
H
y
); and forming a Cu diffusion preventing insulating film on the copper (Cu) wiring layer.
According to the present invention, the natural oxide film on the surface of the Cu wiring layer is removed by exposing the surface of the Cu wiring layer, which is subjected to the annealing process, to the plasma of the ammonia gas, etc., for example, in a non-oxidizing gas atmosphere.
Then, the surface of the Cu wiring layer, from which the natural oxide film has been removed, is exposed to an atmosphere or plasma of the gas selected from the group consisting of ammonia gas, ethylenediamine gas, &bgr;-diketone gas, a mixed gas consisting of ammonia gas and the hydrocarbon gas (C
x
H
y
), and a mixed gas consisting of the nitrogen gas and the hydrocarbon gas (C
x
H
y
).
If the surface of the Cu wiring layer is treated with the plasma to remove the natural oxide film, a compound layer (or a bonding layer) in which an element such as N, H, C, or the like contained in these gases is combined with or bonded to Cu is formed on the surface of the Cu wiring layer. If the ethylenediamine gas, the fÀ-diketone gas, or the like is employed, a complex is formed on the surface of the Cu wiring layer.
Then, a Cu diffusion preventing insulating film is formed on the Cu wiring layer that has been subjected to the surface treatment. Since the above-described compound layer is formed on the surface of the Cu wiring layer, the generation of projections at the surface of the Cu wiring layer during forming the Cu diffusion preventing insulating film or during the later annealing can be suppressed. Accordingly, even if the film thickness of the Cu diffusion preventing insulating film is reduced, the diffusion of Cu can be prevented.
In addition, the surface portion (compound layer) of the Cu wiring layer can also function as the Cu diffusion preventing film. Therefore, even if an insulating film with a low dielectric constant and a low Cu diffusion preventing capability is employed as the Cu diffusion preventing insulating film, the diffusion of Cu can be prevented.
As a result, since an increase in the capacitance between the Cu wiring layers can be prevented, the multi-layered wiring for a high-performance LSI having a small wiring delay can be manufactured.
Also, the present invention provides a semiconductor device manufacturing method which comprises the steps of exposing a surface of a copper (Cu) wi

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