Gate structure and method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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Details

C438S216000, C438S261000, C438S287000, C438S585000, C438S591000, C438S785000, C438S786000

Reexamination Certificate

active

06797599

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to electronic semiconductor devices, and, more particularly, to gate structures and fabrication methods for integrated circuits.
The trend in semiconductor integrated circuits to higher device densities by down-scaling structure sizes and operating voltages has led to silicon field effect (MOS) transistor gate dielectrics, typically made of silicon dioxide, to approach thicknesses on the order of 1-2 nm to maintain the capacitive coupling of the gate to the channel. However, such thin oxides present leakage current problems due to carrier tunneling through the oxide. Consequently, alternative gate dielectrics with greater dielectric constants to permit greater physical thicknesses have been proposed. Indeed, Ta
2
O
5
, (Ba,Sr)TiO
3
, and other high dielectric constant materials have been suggested, but such materials have poor interface stability with silicon.
Wilk and Wallace, Electrical Properties of Hafnium Silicate Gate Dielectrics Deposited Directly on Silicon, 74 Appl. Phys. Lett. 2854 (1999), disclose measurements on capacitors with a hafnium silicate dielectric formed by sputtering (at a pressure of 5×10
−4
Torr and substrate temperature of 500° C.) a 5-nm thick layer of Hf
6
Si
29
O
65
directly onto silicon together with a gold top electrode deposited on the silicate dielectric. Such capacitors showed low leakage current, thermal stability, an effective dielectric constant of about 11, and a breakdown field of 10 MV/cm.
However, such silicate dielectrics need better electrical properties for use in high volume production silicon integrated circuits.
SUMMARY OF THE INVENTION
The invention provides silicon-based integrated circuits and fabrication methods for high-k gate dielectrics including a liquid-based oxidation treatment.
This has the advantages of enhanced electrical performance for high-k dielecttrics.


REFERENCES:
patent: 6020243 (2000-02-01), Wallace et al.
patent: 6395650 (2002-05-01), Callegari et al.

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