Etching a substrate: processes – Gas phase etching of substrate – Application of energy to the gaseous etchant or to the...
Reexamination Certificate
2002-08-12
2004-04-13
Webb, Gregory (Department: 1751)
Etching a substrate: processes
Gas phase etching of substrate
Application of energy to the gaseous etchant or to the...
C252S079100, C438S720000, C510S175000, C510S176000, C134S113000
Reexamination Certificate
active
06719917
ABSTRACT:
RELATED APPLICATION
This application claims priority from Korean Patent Application No. 2001-48971, filed on Aug. 14, 2001, the contents of which are incorporated herein by reference in their entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device and, more particularly, to a method of ashing a semiconductor device having a metal interconnection.
2. Description of the Related Art
To complete the formation of integrated circuits, interconnections such as metal interconnections are used to interconnect semiconductor devices formed in the semiconductor substrate. The metal interconnections may be formed by an anisotropic etch process using a chlorine-based chemical material, e.g., Cl
2
and BCl
3
, as an etching gas. After the etch process, chlorine still remains in polymer formed on the sides of the metal interconnections. As a result, when the semiconductor substrate is unloaded from a reaction chamber after the etch process, chlorine reacts with hydrogen in the air, forming HCl which causes corrosion of the metal interconnections. Also, after forming the metal interconnections, the remaining photoresist pattern and polymer can form a bridge between the metal interconnections. Therefore, it is necessary to completely remove the remaining photoresist pattern and polymer.
In order to solve the above-mentioned problems, an ashing process has been introduced. In the ashing process, the remaining chlorine is removed in the first step. Then, the remaining photoresist pattern and polymer are removed in the second step. Korean laid-open Patent No. 96-009976 suggests an ashing process using CF
4
gas and O
2
gas during the first step and using O
2
gas and N
2
gas during the second step. However, in this method, the surface of metal interconnections may be attacked. Also, U.S. Patent Publication No. 5,200,031 discloses an ashing method using NH3 gas during the first step and using O
2
gas and NH
3
gas during the second step. However, the foregoing ashing method cannot completely remove the remaining chlorine, photoresist pattern or polymer.
SUMMARY OF THE INVENTION
The present invention provides a method of ashing a semiconductor device, which inhibits corrosion of a metal interconnection and sufficiently removes a photoresist pattern and polymer.
According to an embodiment of the present invention, a method of ashing a semiconductor device having a metal interconnection comprises a loop including a first step of using a passivating gas and a second step of using a stripping gas. The process is preferably performed at least two times alternately or repeatedly. The passivating gas preferably includes water vapor and the stripping gas preferably includes a gas mixture of oxygen, nitrogen and water vapor. The stripping gas may include a mixture of only oxygen and nitrogen. It is preferable to proceed with the steps of using the passivating gas and using the stripping gas under a pressure of 0.5 to 3 Torr and at a temperature of 200 to 270° C. It is also preferable to proceed with the steps of using the passivating gas and using the stripping gas successively in the same reaction chamber.
A method of forming the metal interconnection comprises the steps of forming a metal layer on a semiconductor substrate; forming a photoresist pattern on the metal layer; and etching the metal layer using the photoresist pattern as an etch mask. The step of etching the metal layer is carried out using a mixture of Cl
2
and BCl
3
as an etch gas.
REFERENCES:
patent: 5007981 (1991-04-01), Kawasaki
patent: 5200031 (1993-04-01), Latchford et al.
patent: 5630904 (1997-05-01), Aoyama
patent: 5925577 (1999-07-01), Solis
patent: 1019960009976 (1996-07-01), None
English language abstract of Korea Patent No. 1019960009976, 1996.
Marger Johnson & McCollom, PC.
Samsung Electronics Co,. Ltd.
Webb Gregory
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