Method of embedding an identifying mark on the resin surface...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S112000, C438S113000

Reexamination Certificate

active

06680220

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a single-side-molded semiconductor device, which includes a wiring substrate having a ball grid array (BGA) arranged on the lower surface and a semiconductor chip molded with a resin encapsulant on the upper surface. The present invention also relates to a method for fabricating the device.
A semiconductor device of the BGA type has been available as a semiconductor device of an area array type. In the BGA type semiconductor device, a semiconductor chip is mounted and molded with a resin encapsulant on the upper surface of a substrate, and ball electrodes are attached to the lower surface thereof.
FIG. 12
is a plan view illustrating a known semiconductor device of the BGA type.
FIG. 13
is a bottom view illustrating the known BGA type semiconductor device.
FIG. 14
is a cross-sectional view thereof taken along the line XIVb—XIVb in FIG.
12
.
As shown in
FIGS. 12
,
13
and
14
, the known semiconductor device includes a wiring substrate
103
, wiring electrodes
101
, a semiconductor chip
104
, metal fine wires
105
, ball electrodes
102
and a resin encapsulant
106
. The wiring substrate
103
is made of an insulating resin. The wiring electrodes
101
are formed on the wiring substrate
103
. The semiconductor chip
104
is mounted on the wiring substrate
103
with the principal surface of the semiconductor chip
104
facing upward. Electrode pads (not shown) formed on the semiconductor chip
104
and the wiring electrodes
101
are electrically connected to each other with the metal fine wires
105
. The ball electrodes
102
are formed on the lower surface of the wiring substrate
103
. The resin encapsulant
106
is provided on the upper surface of the wiring substrate
103
. The semiconductor chip
104
, wiring electrodes
101
, metal fine wires
105
and the like are molded with the resin encapsulant
106
on the upper surface of the wiring substrate
103
. Although not shown in
FIG. 14
, external pad electrodes are formed on the lower surface of the wiring substrate
103
. The external pad electrodes are electrically connected to the wiring electrodes
101
through the substrate. The ball electrodes
102
are formed on the external pad electrodes.
The known semiconductor device has an approximately rectangular planar shape and the adjacent side faces thereof are perpendicular to each other. The outer shape has been determined so that the fabrication process of the semiconductor device can be simplified. Also, marks
107
representing product name, product number, model number, manufacturer name, and symbol, for example, are inscribed on the upper surface of the resin encapsulant
106
by a laser marking process step.
In addition, in the known semiconductor device, the ball electrodes
102
attached to the wiring substrate
103
are solder balls. The solder balls are attached to the wiring substrate
103
so that the overall semiconductor device can be highly reliably mounted and bonded onto a motherboard. Also, as shown in
FIG. 14
, the ball electrodes
102
are arranged on the lower surface of the wiring substrate
103
in a latticed shape.
Next, the fabrication process of the known semiconductor device will be described.
FIGS. 15A and 15B
are respectively a plan view and a bottom view illustrating a wiring substrate in the known semiconductor device.
FIGS. 16A and 16B
are plan views illustrating a substrate preparation process step and a die bonding process step, respectively, in the fabrication process of the known semiconductor device.
FIGS. 17A and 17B
are plan views illustrating a wire bonding process step and a resin molding process step, respectively, in the fabrication process of the known semiconductor device.
FIG. 18
is a plan view illustrating a cutting process step in the fabrication process of the known semiconductor device.
As shown in
FIGS. 15A and 15B
, the multiple wiring electrodes
101
are formed on the upper surface of the wiring substrate, and external pad electrodes
107
are formed on the lower surface of the wiring substrate. The external pad electrodes
107
are electrically connected to the wiring electrodes
101
through the substrate. The ball electrodes will be attached to the external pad electrodes
107
in the subsequent process step. The wiring substrate is a large-sized substrate on which multiple semiconductor chips will be mounted and which will be separated into individual semiconductor devices. The broken lines shown in
FIGS. 15A and 15B
are cutting lines, which will be used to separate the substrate into the individual semiconductor devices. Also, in each of the regions defined by the cutting lines in
FIG. 15A
, a central area surrounded by each array of the wiring electrodes
101
is a chip mounting area where each of the semiconductor chips is mounted by bonding.
First, the wiring substrate with the structure shown in
FIGS. 15A and 15B
is prepared in the substrate preparation process step shown in FIG.
16
A.
Next, each of the semiconductor chips
104
is bonded, with an adhesive, onto each of the chip mounting areas of the wiring substrate in the die bonding process step shown in FIG.
16
B.
Subsequently, the electrode pads (not shown) formed on the principal surface of each of the semiconductor chips
104
and their associate wiring electrodes
101
formed on the wiring substrate are electrically connected to each other with the metal fine wires
105
in the wire bonding process step shown in FIG.
17
A.
Then, the members disposed on the upper surface of the wiring substrate, e.g., the semiconductor chips
104
, wiring electrodes
101
, metal fine wires
105
, are transfer-molded with the resin encapsulant
106
in the resin molding process step shown in FIG.
17
B. Thereafter, the marks
107
such as product name, product number, model number, manufacturer name, and symbol, for example, are inscribed on the upper surface of the resin encapsulant
106
for each of the semiconductor devices by a laser marker. The wiring electrodes
101
and semiconductor chips
104
are indicated by the broken lines in FIG.
17
B. However, the metal fine wires
105
are not shown in the figure.
Next, in the cutting process step shown in
FIG. 18
, the wiring substrate having the upper surface entirely molded with the resin encapsulant
106
is cut along the cutting lines using a rotary blade, thereby obtaining individual semiconductor devices
109
of the BGA type. Hence, the semiconductor devices
109
with the structure shown in
FIGS. 13 and 14
can be obtained.
In this example, the wiring substrate is cut, using the rotary blade, along the cutting lines indicated by the broken lines shown in
FIGS. 15A and 15B
. In this manner, the individual semiconductor devices can be obtained accurately. Normally, the separation by the rotary blade is performed using a dicing machine used in the fabrication process of the semiconductor device. Also, in the cutting process step, the wiring substrate is cut from either the lower surface or the resin encapsulant
106
side thereof.
In the subsequent process step, which is not shown, in each of the individual semiconductor devices
109
, solder balls are attached to the external pad electrodes
107
formed on the lower surface of the wiring substrate
103
. In this manner, the multiple ball electrodes are formed and will be used as external terminals.
The process steps for fabricating the known BGA type semiconductor device have been performed in the above-described manner, i.e., the large-sized substrate on which the multiple semiconductor chips can be mounted is used. Then, a large number of semiconductor chips are mounted on the substrate, the associate members are electrically connected, the members on the wiring substrate are molded with the resin encapsulant, and the marking is performed. Thereafter, the wiring substrate is cut into the individual semiconductor devices of the BGA type in the end.
Particularly, the marking process step is performed after the members disposed on the upper surface of the wiring subst

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