Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2001-11-15
2004-05-11
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S695000, C438S699000, C438S704000, C438S705000
Reexamination Certificate
active
06734105
ABSTRACT:
This application claims the benefit of Korean Application No. P2000-68406 filed Nov. 17, 2000, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming silicon quantum dots and a method for fabricating a nonvolatile memory device using the same, and more particularly, to a method for forming silicon quantum dots and a method for fabricating a nonvolatile memory device using the same which is suitable for high speed and high packing density.
2. Background of the Related Art
Generally, a nonvolatile memory device based on silicon quantum dots has operation principles equal to EEPROM. If a light gate voltage higher than a threshold voltage is applied to a channel in the same manner as a conventional MOSFET, an inversion layer is formed so that electrons of a source are induced to the channel. For this reason, channel conductance is lowered. In this state, electrons of the inversion layer in the channel are directly tunneled through a thin insulating film. Thus, silicon quantum dots two-dimensionally distributed on the tunneling insulating film are tunneled one by one. An energy barrier increases due to the charge energy of the tunneled electrons, thereby preventing the next electrons from being tunneled.
This makes charge energy by one of the tunneled electrons, higher than thermal oscillation of electrons by temperature. This is applied to a room temperature in the same manner. Even in cases where one electron is tunneled per silicon quantum dot having a constant density, channel conductance is lowered, thereby moving the threshold voltage in positive direction.
Although one electron per silicon quantum dot may be used for programming, a shift of the threshold voltage is too small to sense the amount of the channel conductance. Accordingly, for actual application, the shift of the threshold voltage of 1V or greater is used by tunneling three to four electrons.
In this respect, to increase the charge energy, it is necessary to lower self capacitance of the quantum dot to the maximum range. In this case, a surface area of the silicon quantum dot should be reduced to the minimum range. Also, to use a higher threshold voltage shift, a silicon quantum dot of high density is required.
Particularly, in using a constant threshold voltage shift, it is important to obtain uniformity of the silicon quantum dots and reproducibility of the formation process.
Meanwhile, the silicon quantum dots means dots formed for each unit of atoms. However, it is difficult to actually form the silicon quantum dots for each unit of atoms. Therefore, silicon quantum dots are silicon islands formed at a very small size that act as silicon quantum dots.
A related art method for forming silicon quantum dots and method for fabricating a nonvolatile memory device using the same will be described with reference to the accompanying drawings.
FIGS. 1
a
to
1
f
are sectional views of process steps showing a related art method for forming silicon quantum dots and method for fabricating a nonvolatile memory device.
As shown in
FIG. 1
a
, field oxide films
12
are formed in a silicon substrate
11
in which an active region and a field region are defined by local oxidation of silicon (LOCOS) process. Subsequently, a tunneling insulating film
13
is formed on the silicon substrate
11
, and a plurality of islands shaped silicon quantum dots
14
are formed on the tunneling insulating film
13
at a size of about 39 nm.
As shown in
FIG. 1
b
, an insulating film
15
is formed on an entire surface of the silicon substrate
11
including the silicon quantum dots
14
.
As shown in
FIG. 1
c
, a polysilicon film for a control gate is formed on the insulating film
15
and then selectively removed by photolithography and etching processes to form a control gate
16
.
As shown in
FIG. 1
d
, the insulating film
15
and the silicon quantum dots
14
are selectively removed using the control gate
15
as a self mask. Subsequently, source/drain impurity ions are implanted into a surface of the silicon substrate
11
at both sides of the control gate
16
to form source/drain impurity regions
17
.
As shown in
FIG. 1
e
, an interleaving insulating film
18
is formed on the entire surface of the silicon substrate
11
by chemical vapor deposition method to insulate the control gate
16
from a metal line which will be formed later. A spin on glass (SOG) film
19
is formed on the interleaving insulating film
18
.
Subsequently, the SOG film
19
, the interleaving insulating film
18
and the tunneling insulating film
13
are selectively removed by photolithography and etching processes to partially expose a surface of the source/drain impurity regions
17
. Thus, a contact hole
20
is formed.
As shown in
FIG. 1
f
, a metal film is deposited by sputtering method on the entire surface of the silicon substrate
11
including the contact hole
20
. The metal film is then selectively removed by photolithography and etching processes to form a metal line
21
which is connected to the source/drain impurity regions
17
through the contact hole
20
.
However, the related art method for forming silicon quantum dots and method for fabricating a nonvolatile memory device using the same has several problems.
First, when depositing polysilicon or amorphous silicon, amorphous silicon seeding is only performed using incubation time (the time when initial silicon is seeded under the formation conditions of silicon). In this case, it is difficult to obtain stability of the process steps and to control the process steps.
Second, distribution uniformity of the silicon quantum dots is not good, having a great size and low density. Accordingly, it is not a reliable memory.
Third, if an amorphous silicon is formed, deformation in a configuration of the silicon quantum dots may occur due to the process steps of forming a grain and recrystallizing it in a later thermal process.
Finally, field disturbance due to adjacent drains may occur where LOCOS isolation is used, causing various problems related to functions of the memory.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method for forming silicon quantum dots and a method for fabricating a nonvolatile memory device using the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
The present invention provides a method for forming silicon quantum dots and a method for fabricating a nonvolatile memory device using the same which is suitable for high speed and high packing density.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method for forming silicon quantum dots according to the present invention includes the steps of forming a first insulating film on a semiconductor substrate, forming a plurality of nano-crystalline silicons on the first insulating film, forming a second insulating film on the first insulating film including the nano-crystalline silicons, partially etching the second insulating film and the nano-crystalline silicons, and oxidizing surfaces of the nano-crystalline silicons.
In another aspect, a method for fabricating a nonvolatile memory device according to the present invention includes the steps of forming a tunnelling insulating film on a semiconductor substrate, forming a plurality of nano-crystalline silicons on the tunnelling insulating film, forming a first insulating film on the tunnelling insulating film including the nano-crystalline silicons, partially etching the first insulating film and
Hyundai Electronics Industries Co,. Ltd.
Morgan & Lewis & Bockius, LLP
Norton Nadine G.
Tran Binh X.
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