Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-07-26
2004-09-28
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S623000, C438S637000, C438S665000
Reexamination Certificate
active
06797605
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to a method of metallization in the fabrication of integrated circuits, and more particularly, to a method of improving adhesion of low dielectric constant materials to other materials during metallization in the manufacture of integrated circuits.
(2) Description of the Prior Art
The damascene or dual damascene process has become a future trend in integrated circuit manufacturing, especially in the copper metallization process. In a typical copper damascene scheme, dielectric layers are formed over a passivation layer on a substrate. An etch stop layer may be formed between two dielectric layers and a cap layer may be formed over the topmost dielectric layer. A via and trench are patterned into the dielectric layers to the passivation layer. Then a barrier metal layer is deposited within the trench and via, followed by deposition of a copper layer to fill the damascene opening.
Low dielectric constant materials are preferably used to reduce capacitance. An integration challenge facing damascene interconnects incorporating low dielectric constant materials and copper is the adhesion of these low dielectric constant materials to other damascene films. Poor adhesion is a cause for reliability concerns. In recent experiments, the inventors have determined that tetraethoxysilane (TEOS)-based silicon oxide did not adhere well on carbon-doped silicon oxide materials such as alkyl silsesquioxanes and perhydrosilazanes. It is desired to find a method to improve adhesion of low dielectric constant materials with other dielectric materials.
U.S. Pat. No. 6,184,123 to Ge et al discloses a silicon ion implantation into spin-on-glass to improve adhesion to an overlying silicon nitride layer. U.S. Pat. No. 6,143,670 to Cheng et al shows a nitrogen ion implantation into a polymer layer to improve adhesion to an overlying layer containing silicon, oxygen, and nitrogen. U.S. Pat. No. 5,985,750 to Oda implants silicon ions into a BPSG layer to form a damage layer before depositing a fluorine amorphous carbon layer. U.S. Pat. No. 6,117,798 to Fang et al and U.S. Pat. No. 5,459,086 to Yang teach an ion implantation into spin-on-glass to prevent moisture absorption. U.S. Pat. No. 5,192,697 to Leong teaches curing of spin-on-glass using ion implantation. U.S. Pat. No. 4,849,248 to Hashimoto discloses silicon ion implantation into silicon dioxide to control grain size. U.S. Pat. No. 6,153,523 to Van Ngo et al shows the use of an ammonia-containing plasma to roughen a copper surface to improve adhesion of an overlying silicon nitride capping layer.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide an effective and very manufacturable method of improving adhesion of dielectric films in the fabrication of integrated circuit devices.
Another object of the invention is to provide a method of improving adhesion of dielectric films in a damascene metallization process.
Yet another object of the invention is to a method of improving adhesion of low dielectric constant films to other dielectric films in a damascene process.
In accordance with the objects of this invention a method of improving adhesion of low dielectric constant films to other dielectric films in a damascene process is achieved. A low dielectric constant material layer is deposited on a substrate. Silicon ions are implanted into the low dielectric constant material layer. Thereafter, a TEOS-based silicon oxide layer is deposited overlying the low dielectric constant material whereby there is good adhesion between low dielectric constant material layer and the TEOS-based silicon oxide layer.
Also, in accordance with the objects of the invention, another method of improving adhesion of low dielectric constant films to other dielectric films in a damascene process is achieved. A low dielectric constant material layer is deposited on a substrate. A silicon-based dielectric layer is deposited overlying the low dielectric constant material wherein the silicon-based dielectric layer is not silicon oxide whereby there is good adhesion between the low dielectric constant material layer and the silicon-based dielectric layer.
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patent: 5192697 (1993-03-01), Leong
patent: 5459086 (1995-10-01), Yang
patent: 5554567 (1996-09-01), Wang
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patent: 6153523 (2000-11-01), Van Ngo et al.
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Chooi Simon
Goh Luona
Tay Tong Earn
Toh Siew Lok
Chartered Semiconductor Manufacturing Ltd.
Picardat Kevin M.
Pike Rosemary L. S.
Saile George O.
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