Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2002-05-01
2004-05-04
Vu, Hung (Department: 2811)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S687000, C438S725000
Reexamination Certificate
active
06730618
ABSTRACT:
DESCRIPTION
1. Field of the Invention
The present invention relates to integrated circuits (ICs), and in particular to an interlayer dielectric which is capable of reducing or eliminating copper (Cu) ion migration in ICs. The interlayer dielectric of the present invention comprises a low dielectric constant dielectric material (k of 3.0 or less) that is modified to include an additive that has a high affinity for Cu ions, yet is soluble in the dielectric matrix.
2. Prior Art
In current IC chip designs which utilize copper (Cu) lines and organic, low k dielectrics as an interlayer dielectric, Cu ion migration barriers are typically made of high dielectric constant (k greater than 3.0) inorganic dielectrics such as silicon nitride or silicon dioxide. These inorganic dielectrics which are typically positioned between the interlayer dielectric and the Cu lines are used to reduce or eliminate Cu ion migration under electrical bias. Cu ion migration under electrical bias can occur under typical working conditions of the IC chip over a long period of time. Shorting of the circuits which is caused by Cu ion migration determines the useful life of the chip.
Presently, Cu ion migration barriers have high dielectric constants associated therewith. Typically, the dielectric constants of prior art Cu ion migration barriers are greater than 3.0, preferably 7.0 or above. The utilization of such high dielectric constant Cu ion migration barriers is not practical with today's generation of IC chips; the employment of the same increases the overall dielectric constant of the IC chip, i.e. the sum of the dielectric constant of the ion migration barrier layer plus that of the interlayer dielectric (ILD) times their respective thickness. The higher the dielectric constant of the ILD, the lower the performance of the chip.
As stated above, prior art Cu ion migration barriers are used in conjunction with low k ILDs. The manufacture of separate dielectric barrier layers not only increases the overall dielectric constant deteriorating chip performance, but also adds additional processing steps which add to the complexity and cost of chip manufacturing.
To date, no successful use of only a low k ILD as a Cu ion migration barrier has been realized since such materials readily permit Cu ion migration. Despite this problem, low k dielectrics are extremely advantageous since the use of the same does not significantly increase the dielectric constant of the entire IC chip. There is thus a need to develop new low k dielectrics which can serve as both the interlayer dielectric and as a Cu ion migration barrier in reducing or eliminating Cu ion migration in IC chips containing Cu wiring.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a low k dielectric material which can be used as an interlayer dielectric, yet is capable of reducing and/or eliminating Cu ion migration in IC chips containing Cu wiring.
A further object of the present invention is to provide a low k dielectric material which increases the lifetime of high-speed IC chips.
A still further object of the present invention is to provide a low k dielectric (serving as both the interlayer dielectric and Cu ion migration barrier) that is easy to fabricate, yet does not add additional processing steps and costs in IC manufacturing.
A yet further object of the present invention is to provide IC chips in which Cu ion migration has been significantly reduced or eliminated.
These and other objects and advantages can be obtained in the present invention by utilizing a low k dielectric material which includes a modifier therein that inherently prevents Cu ions from migrating there through. The utilization of such a dielectric material, as the interlayer dielectric, eliminates the need of employing a separate inorganic barrier layer to prevent Cu ion migration. Elimination of inorganic Cu ion migration barrier layers reduces processing steps and cost in IC processing as well as avoiding the use of high dielectric materials which serve to increase the overall dielectric constant of the IC chip.
Specifically, one aspect of the present invention relates to a new interlayer dielectric which comprises a dielectric material having a dielectric constant of 3.0 or less, said dielectric material including an additive which has a high affinity for binding (or complexing) Cu ions, yet being soluble in said dielectric material. The presence of the additive in the dielectric material allows the inventive interlayer dielectric to be used as a barrier layer preventing Cu ion migration without significantly increasing the dielectric constant of the ILD.
Another aspect of the present invention relates to semiconductor structures, particularly IC chips, which include the above described interlayer dielectric therein. Specifically, the present invention provides an IC structure comprising: a substrate, the interlayer dielectric of the present invention formed on said substrate, a Cu region formed on or within said interlayer dielectric, and a passivation layer formed on said Cu region. The final IC chip interconnect structure may contain many layers of interlayer dielectrics and a signal or reference plane patterns and Cu vias.
A further object of the present invention is to provide a method of forming an IC structure which contains the interlayer dielectric of the present invention therein. In accordance with this aspect of the present invention, the method comprises forming the interlayer dielectric of the present invention on the surface of a substrate; forming a Cu region on or within said interlayer dielectric; and forming a passivation layer on said Cu region.
It is also within the scope of the present invention to use the interlayer dielectric of the present invention in conjunction with separate inorganic ion migration barrier layers. In this optional embodiment of the present invention, the thickness of the inorganic barrier layer can be significantly reduced so that the overall dielectric constant of the structure is not substantially increased from that of the interlayer dielectric. Although the use of a separate inorganic Cu ion migration barrier layer is not necessary, it may be used to provide additionally prevention against Cu ion migration.
REFERENCES:
patent: 5760480 (1998-06-01), You et al.
patent: 5872402 (1999-02-01), Hasegawa
patent: 63-73660 (1988-04-01), None
patent: 08-321217 (1996-12-01), None
patent: 2000-235977 (2000-08-01), None
Cohen Stephan Alan
Feger Claudius
Hedrick Jeffrey Curtis
Shaw Jane Margaret
Morris, Esq. Daniel P.
Scully Scott Murphy & Presser
Vu Hung
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