Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2001-06-04
2004-03-16
Vigushin, John B. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S777000, C257S780000, C257S784000, C257S618000, C257S625000, C257S678000, C257S731000, C438S106000, C438S108000, C438S455000, C438S458000, C438S977000
Reexamination Certificate
active
06707160
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-167878, filed Jun. 5, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor module having, for example, a plurality of semiconductor chips mounted in a three dimensional direction, particularly, to a semiconductor memory module requiring miniaturization and a method of manufacturing the same.
The semiconductor module mounted to, for example, a personal computer or a portable terminal apparatus is required to have a large capacity and to be miniaturized.
FIGS. 16
to
18
show conventional semiconductor modules.
FIG. 16
covers the case where a plurality of semiconductor chips are mounted in a two dimensional direction. In
FIG. 16
, a plurality of semiconductor chips or a plurality of CSP's (Chip Scale Packages)
1
a
,
1
b
,
1
c
and id are mounted on the same surface of plate-like printed circuit board
2
.
FIG. 17
exemplifies the case where a plurality of semiconductor chips are mounted in a three dimensional direction. In
FIG. 17
, a plurality of semiconductor chips
3
a
,
3
b
,
3
c
and
3
d
are mounted to a thin type packages
4
a
,
4
b
,
4
c
and
4
d
, respectively, such as TCP's (Tape Carrier Packages). These packages
4
a
,
4
b
,
4
c
and
4
d
are stacked one upon the other so as to form a stacked body. The stacked body thus prepared is mounted to a plate-like printed circuit board
5
.
FIG. 18
exemplifies another three dimensional mounting and is directed to the case where a plurality of bare chips are stacked one upon the other. In this case, a stacked body
6
includes a plurality of semiconductor chips
6
a
,
6
b
,
6
c
stacked one upon the other. The stacked body
6
is mounted to a plate-like printed circuit board
7
.
Where a plurality of semiconductor chips are mounted in a two dimensional direction as shown in
FIG. 16
, the area of the printed circuit board
2
is increased in proportion to the increase in the number of chips. As a result, the mounting area of the entire semiconductor module having a plurality of semiconductor chips mounted to a printed circuit board is increased, resulting in failure to miniaturize sufficiently the semiconductor module.
In the case of the three dimensional mounting as shown in
FIGS. 17 and 18
, it is certainly possible to increase the mounting density, compared with the two dimensional mounting shown in FIG.
16
. However, in the case of the three dimensional mounting shown in
FIG. 17
, the mounting area depends on the size of the packages
4
a
,
4
b
,
4
c
,
4
d
, and the volume of the semiconductor module is increased with increase in the number of stacks of the packages. As a result, it is difficult to make the size of the semiconductor module smaller than the size of the package. Also, in the case of the three dimensional mounting shown in
FIG. 18
, the mounting area depends on the size of the bare chip, making it difficult to make the size of the semiconductor module smaller than the size of the chip.
As described above, in the conventional semiconductor module, the size of the module is limited by the size of the package or chip, making it difficult to sufficiently miniaturize the semiconductor module.
BRIEF SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device that permits making the size of a semiconductor module smaller than the size of the chip and a method of manufacturing the same.
According to a first aspect of the present invention, there is provided a semiconductor device, comprising a cylindrical substrate, and at least one semiconductor chip mounted on the circumferential surface of the substrate, the semiconductor chip being bent along the surface of the substrate.
According to a second aspect of the present invention, there is provided a semiconductor device, comprising a cylindrical substrate, and at least one stacked body formed on the circumferential surface of the substrate, the stacked body including a plurality of semiconductor chips stacked one upon the other and being bent along the surface of the substrate.
According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: bending at least one semiconductor chip; and mounting the bent semiconductor chip on at least one region of the surface of a cylindrical substrate.
Further, according to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: mounting at least one semiconductor chip on at least a region of the surface of a flexible substrate; and bending the substrate into a cylindrical form.
According to the present invention, a semiconductor substrate comprises a cylindrical substrate and at least one bent semiconductor chip arranged on the substrate. The size of the semiconductor module can be made smaller than the size of the chip by diminishing the curvature radius of the bent semiconductor chip.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
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Mitsuru Oida et al.; “Semiconductor Device Including Integrated Circuits on a Polyhedral Semiconductor”; US patent application Ser. No. 09/499,692, f iled Feb. 8, 2000.
Kevin Chen et al.; “Ultra-Thin Electronic Device Package”; 1999 Electronic Components and Technology Conference; IEEE.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Mitchell James
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