Engineered metal gate electrode

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S388000

Reexamination Certificate

active

06727560

ABSTRACT:

TECHNICAL FIELD
The present invention relates to semiconductor devices comprising transistors with metal gate electrodes and to fabrication techniques for engineering a metal gate electrode with a tunable work function and high quality gate dielectric. The present invention is particularly applicable to fabricaturing high speed semiconductor devices having submicron design features.
BACKGROUND ART
The integration of hundreds of millions of circuit elements, such as transistors, on a single integrated circuit necessitates further dramatic scaling down or micro-miniaturization of the physical dimensions of circuit elements, including interconnection structures. Micro-miniaturization has engendered a dramatic increase in transistor engineering complexity, such as the inclusion of graded well-doping, epitaxial wafers, halo implants, tip implants, lightly doped drain structures, multiple implants for source/drain regions, silicidation of gates and source/drains, and multiple sidewall spacers, for example.
The drive for high performance requires high speed operation of microelectronic components requiring high drive currents in addition to low leakage, i.e., low off-state current, to reduce power consumption. Typically, the structural and doping parameters tending to provide a desired increase in drive current adversely impact leakage current.
Recently, metal gate electrodes have evolved for improving the drive current by reducing polysilicon depletion. However, simply replacing polysilicon gate electrodes with metal gate electrodes may engender issues such as, increased leakage current because of an undesired value of work function which in turn provides undesired electrical characteristics for the transistor. The work function is the amount of energy required to excite electrons across a threshold. Polysilicon gates on silicon substrate provide a work function that allows the gates to be adequately controlled. However, the use of a metal gate electrode on a silicon substrate undesirably alters the work function vis-à-vis polysilicon, thereby reducing the controllability of the gate. Another disadvantage of a metal gate process resides in forming the metal gate electrode prior to high temperature annealing to activate the source/drain implants, as at a temperature in excess of 900° C. This fabrication technique may degrade the metal gate electrode or cause interaction with the gate dielectric, thereby adversely impacting transistor performance.
Accordingly, a need exists for methodology enabling the fabrication of micro-miniaturized semiconductor devices comprising transistors with metal gate electrodes having a tunable work function, improved gate dielectric quality and increased transistor surface mobility.
DISCLOSURE OF THE INVENTION
An advantage of the present invention is a semiconductor device having a transistor with a metal gate electrode having an engineered work function, improved gate oxide quality and effective transistor surface mobility.
Another advantage of the present invention is a method of manufacturing a semiconductor device comprising a transistor with a tunable work function, improved gate oxide quality and effective transistor surface mobility.
Addition advantages and other features of the present invention will be set forth in the description which follows and, in part, will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the present invention. The advantages of the present invention may be realized and obtained as particularly pointed out in the appended claims.
According to the present invention, the foregoing and other advantages are achieved in part by a semiconductor device comprising: a metal gate electrode, having top, bottom and side surfaces, over a substrate with a gate dielectric therebetween, wherein the metal gate electrode comprises: a layer of tantalum nitride forming the bottom and side surfaces, the layer of tantalum nitride having a nitrogen content that increases from the gate dielectric layer toward the top surface.
Embodiments of the present invention comprise a metal gate electrodes having a single graded layer of tantalun nitride forming the bottom and side surfaces of the gate electrode wherein in the nitrogen content increases from 10 at. % at the bottom interfacing with the underlying gate dielectric layer to 70 at. % at the upper surface of the tantalum nitride layer, the remainder of the gate electrode comprising a metal, such as copper (Cu), a Cu alloy, tantalum, tantalum nitride or tungsten. Embodiments of the present invention include forming multiple layers of tantalum nitride, such as two or three layers, wherein each layer of tantalum nitride has a nitrogen content greater than the underlying layer. Embodiments of the present invention include forming layers of tantalum nitride having a thickness of 15 Å to 25 Å.
Another aspect of the present invention is a method of manufacturing a semiconductor device, the method comprising forming a removable gate over a substrate with a gate dielectric layer therebetween; forming a dielectric layer over the substrate and exposing an upper surface of the removable gate; removing the removable gate leaving an opening in the dielectric layer, the opening defined at its bottom by the gate dielectric layer and defined at its sides by exposed surfaces of the dielectric layer; depositing at least one conductive layer, having a work function, on the gate dielectric layer lining the opening at the bottom and sides; modifying the work function of the conductive layer by creating an intrinsic electric field within the metal gate electrode; and depositing a metal on the conductive layer with the modified work function filling the opening.
Embodiments include depositing a layer of tantalum nitride and modifying the work function by varying the nitrogen content across the tantalum nitride layer during deposition such that the nitrogen content increases from the bottom of the tantalum nitride layer at the interface between the gate dielectric layer upwardly in a direction away from the gate dielectric. Embodiments of the present invention further include forming multiple layers of tantalum nitride, each layer having a nitrogen content higher than the underlying layer.
Other embodiments of the present invention include depositing one or more conductive layers and modifying the upper surface of the conductive layer by doping with an impurity. Further embodiments of the present invention comprise engineering the work function of the metal gate by sequentially forming metal layers and heating to form an alloy therebetween.


REFERENCES:
patent: 5998873 (1999-12-01), Blair et al.
patent: 6368923 (2002-04-01), Huang
patent: 6607958 (2003-08-01), Suguro
patent: 2003/0027393 (2003-02-01), Suguro

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