Arc chamber filament for ion implanter

Radiant energy – Ion generation – Arc type

Reexamination Certificate

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C250S42300F

Reexamination Certificate

active

06787781

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to hi-current implanters used to implant ions in semiconductor wafer substrates in the fabrication of semiconductor integrated circuits. More particularly, the present invention relates to a new and improved hi-current implanter arc chamber filament which is characterized by an extended lifetime.
BACKGROUND OF THE INVENTION
In the semiconductor production industry, various processing steps are used to fabricate integrated circuits on a semiconductor wafer. These steps include deposition of a conducting layer on the silicon wafer substrate; formation of a photoresist or other mask such as titanium oxide or silicon oxide, in the form of the desired metal interconnection pattern, using standard lithographic or photolithographic techniques; subjecting the wafer substrate to a dry etching process to remove the conducting layer from the areas not covered by the mask, thereby etching the conducting layer in the form of the masked pattern on the substrate; removing or stripping the mask layer from the substrate typically using reactive plasma and chlorine gas, thereby exposing the top surface of the conductive interconnect layer; and cooling and drying the wafer substrate by applying water and nitrogen gas to the wafer substrate.
Ion implantation is another processing step commonly used in the fabrication of the integrated circuits on the wafer. Ion implantation is a form of doping, in which a substance is embedded into the crystal structure of the semiconductor substrate to modify the electronic properties of the substrate. Ion implantation is a physical process which involves driving high-energy ions into the substrate using a high-voltage ion bombardment. The process usually follows the photolithography step in the fabrication of the circuits on the wafer.
The ion implantation process is carried out in an ion implanter, which generates positively-charged dopant ions in a source material. A mass analyzer separates the ions from the source material to form a beam of the dopant ions, which is accelerated to a high velocity by a voltage field. The kinetic energy attained by the accelerated ions enables the ions to collide with and become embedded in the silicon crystal structure of the substrate. Finally, the doped silicon substrate is subjected to a thermal anneal step to activate the dopant ions.
A phenomenon which commonly results from the ion implantation process is wafer charging, in which positive ions from the ion beam strike the wafer and accumulate in the masking layer. This can cause an excessive charge buildup on the wafer, leading to charge imbalances in the ion beam and beam blow-up, which results in substantial variations in ion distribution across the wafer. The excessive charge buildup can also damage surface oxides, including gate oxides, leading to device reliability problems, as well as cause electrical breakdown of insulating layers within the wafer and poor device yield.
Wafer charging is controlled using a plasma flood system, in which the wafer is subjected to a stable, high-density plasma environment. Low-energy electrons are extracted from an argon or xenon plasma in an arc chamber and introduced into the ion beam, which carries the electrons to the wafer so that positive surface charges on the wafer are neutralized. The energy of the electrons is sufficiently low to prevent negative charging of the wafer.
A typical conventional PFS (plasma flood system) for neutralizing positive charges on ion-implanted wafers is generally indicated by reference numeral
10
in FIG.
1
and includes an arc chamber
12
having a cylindical chamber wall
14
. A single gas inlet opening
18
is provided in the chamber wall
14
. A low voltage source
20
generates a typically 3-volt, 200-amp current through a tungsten filament
22
positioned in the chamber interior
13
. As shown in
FIGS. 1 and 1A
, the filament
22
typically forms a single filament loop
22
a
in the chamber interior
13
. Pressure inside the chamber interior
13
is maintained at about 5 Torr. Simultaneously, by operation of vacuum pressure applied through a vacuum opening
24
in the bottom of the arc chamber
12
, a plasma-forming gas such as argon or xenon is introduced into the chamber interior
13
through the single gas opening
18
, at a flow rate of typically about 1.2 sccm. The filament
22
, heated by the low-voltage current from the current source
20
, causes thermionic emission of electrons from the flowing gas as the gas contacts the filament
22
. The electrons from the gas are electrically attracted to the positively-charged chamber walls
14
, which function as an anode. A toroidal magnet
16
generates a magnetic field which causes the electrons to travel in a spiral flight path in the chamber interior
13
, and this increases the frequency of collisions between the electrons and the gas atoms, resulting in the creation of additional free electrons. The electrons and positive ions are drawn from the chamber interior
13
through the vacuum opening
24
, where the electrons and cations enter an ion beam
26
. The ion beam
26
carries the electrons into contact with a semiconductor wafer
28
which was previously subjected to an ion implantation process. Accordingly, the electrons contact the wafer
28
and neutralize positive ions remaining on the surface of the wafer
28
after the ion implantation process.
A common characteristic of the conventional arc chamber
12
is that the single gas inlet opening
18
facilitates orderly spiral flow of the argon or xenon gas in the chamber interior
13
. Consequently, the plasma-forming gas continually contacts the same point or points on the filament
22
in transit to the vacuum opening
24
. This is illustrated in
FIG. 1B
, in which the flowing gas continually contacts the same point
23
on the filament
22
and, after a relatively short period of operation, causes burnout and breakage of the filament
22
at the point of contact
23
. Consequently, the filament
22
must be replaced typically after about 10 days of operation.
As illustrated in
FIG. 1C
, one way to prevent continuous contact of the gas with the burnout-prone points on the filament
22
is to raise the position of the filament
22
in the chamber interior
13
. However, when the filament
22
is disposed in this raised configuration, much of the gas fails to adequately contact the filament
22
for emission of electrons from the gas, as shown by the gas flow path
30
. Accordingly, a new and improved arc chamber filament for an ion implanter is needed which resists burnout and is characterized by enhanced longevity.
An object of the present invention is to provide a new and improved filament suitable for an arc chamber of an ion implanter.
Another object of the present invention is to provide a new and improved arc chamber filamant which is characterized by enhanced longevity.
Still another object of the present invention is to provide a new and improved arc chamber filament which reduces the costs associated with maintenance of an ion implanter.
Yet another object of the present invention is to provide a new and improved arc chamber filament which contributes to enhanced ion beam quality in an ion implanter.
A still further object of the present invention is to provide a new and improved arc chamber filaments having novel configurations which render the filaments less susceptible to burnout and breakage.
Yet another object of the present invention is to provide a new and improved arc chamber filament which may be shaped to include at least one generally U-shaped winding unit on each side of a plane of symmetry extending through the filament.
Another object of the present invention is to provide a new and improved arc chamber filament which does not damage arc chamber shielding.
SUMMARY OF THE INVENTION
In accordance with these and other objects and advantages, the present invention is generally directed to a new and improved arc chamber filament for an ion implanter used to implant ions in a semiconductor wafer substrate du

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