Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2002-05-03
2003-12-09
Cuneo, Kamand (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S667000, C257S669000
Reexamination Certificate
active
06661089
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related to a semiconductor package and its manufacturing method, and especially to a semiconductor package in which a semiconductor chip is attached to a lead frame and a method for manufacturing the same.
BACKGROUND OF THE INVENTION
Currently, the structure of a semiconductor package, such as solid state image-sensing chip, photosensor, or ultraviolet erasable EP-ROM, includes a premolded resin block disposed ion the lead frame and having a concavity for exposing a portion of the lead frame in the resin molded block to allow the chip to be attached thereon and allow gold wires to be bonded thereon. After an image-sensing chip is directly attached to a predetermined position of the lead flame and electrically connected to the lead frame through gold wires, a covering member is bonded to the resin molded block so as to seal hermetically the whole concavity, thereby isolating the image-sensing chip and gold wires from outside. For example, U.S. Pat. No. 5,070,041 discloses such an image-sensing semiconductor package.
At the same time, in order to meet the requirement of a light, thin, and small electronic product with multiple functions, another chip with a different function is embedded in the above-described semiconductor package, as disclosed in U.S. Pat. No. 5,523,608. As shown in
FIG. 8
, U.S. Pat. No. 5,523,608 discloses a semiconductor package
1
having a chip
11
with peripheral pads attached on the bottom surface
100
of the lead frame
10
. After the chip
11
is electrically connected to the lead frame
10
through gold wires
12
, the lead frame
10
having a chip
11
attached thereon is placed in a package mold (not shown) to form a resin molded block
13
embedding the chip
11
and the gold wires
12
therein. When the resin molded block
13
is formed, a concavity
130
is formed on the top surface
101
of the lead frame
10
relative to the attaching position of the chip
11
. The top surface
101
of the lead frame
10
is partially exposed in the concavity
130
so as to directly attach an image-sensing chip
14
to the lead frame
10
through the concavity
130
. After the image-sensing chip
14
is electrically connected to the lead frame
10
through gold wires
15
, a covering member
16
is bonded on the resin molded block
13
to seal hermetically the whole concavity
130
to accomplish a manufacturing method of the semiconductor package
1
with a multi-chip module.
In the above-described semiconductor package, the resin molded block with a concavity is molded and formed on the lead frame for attaching the semiconductor chip thereon to allow the image-sensing chip to attach on a surface of the lead frame exposed in the concavity. Because the flash of the resin is often formed on the surface of the lead frame exposed in the concavity during the molding process, it will affect the quality of subsequent die-bonding and wire-bonding processes, thereby decreasing the reliability of the fabricated product unless the flash is removed. Therefore, U.S. Pat. No. 5,070,041 discloses a method of removing flash from the semiconductor lead frame. First of all, an organic high molecular substance is coated on the predetermined surface of the lead flame exposed in the concavity of the resin molded block. After completing the molding process and forming the resin molded block partially embedding the lead frame therein, the lead frame combined with the resin molded block is placed in a solvent to remove the organic high molecular coating layer and then the die-bonding and wire-bonding processes are performed. However, such a method of immersing the lead frame combined with the resin molded block in the solvent which can dissolve the organic high molecular substance is time-consuming and complicated. Furthermore, the solvent containing the organic high molecular substance will result in an environmental pollution thereby increasing the processing cost.
U.S. Pat. No. 5,523,608 adopts a blasting way to remove the flash on the lead frame. Besides that the blasting way for removing the flash is time-consuming and requires an additional equipment thereby resulting in an increased cost, the flash particles separating from the surface of the lead flame will spray and adhere to the package equipment. If the flash particles cannot be effectively removed, they will influence the reliability of the next operation. Therefore, the package equipment must be also cleaned thereby further complicating the cleaning work. Moreover, during the blasting process, when a high-speed flow (gas or liquid) generated at a high pressure is applied to the lead frame, it will damage the resin molded block and lead frame, or even the chip with peripheral pads attached on the back side of the lead frame, thereby affecting the reliability of the fabricated product. In addition, this semiconductor package has two chips, and the heat generated from the chips cannot be effectively dissipated thereby influencing the useful life of the chip.
During the molding process of the above-described semiconductor package, the concavities in the upper mold and the lower mold of the used package mold are not symmetrical so that the resin flows for forming the resin molded block are respectively introduced into the concavities in the upper mold and the lower mold at different flow rates. It will easily cause the occurrence of void or popcorn. In addition, in the packaging process disclosed in U.S. Pat. No. 5,523,608, the resin flows respectively introduced into the concavities in the upper mold and the lower mold at different flow rates also easily result in wire sweep of gold wires bonded on the chip with peripheral pads disposed in the lower mold, such that short circuiting will likely occur due to the gold wires contacting each other.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of removing flash from the semiconductor package, which can simplify the manufacturing process and decrease the manufacturing cost.
Another object of the present invention is to provide a semiconductor package and its manufacturing method which can enhance the heat-dissipating efficiency.
Yet another object of the present invention is to provide a semiconductor package and its manufacturing method which can prevent the occurrence of popcorn that can influence the reliability of products.
A further object of the present invention is to provide a semiconductor package and its manufacturing method without the problem of environmental pollution.
In accordance with one aspect of the present invention, the method includes the steps of preparing a lead frame having a first surface and a second surface, attaching an adhesive tape capable of being easily removed on the second surface of the lead frame, forming a resin molded block on a predetermined position of the first surface of the lead frame, removing the adhesive tape, attaching a semiconductor chip on a chip-adhering region of the second surface of the lead frame and electrically connecting the semiconductor chip with the lead frame, attaching a frame with a hollow portion on a predetermined position of the second surface of the lead frame by an adhesive agent and containing the semiconductor chip in the hollow portion, and bonding a covering member on the frame to seal the hollow portion for isolating the semiconductor chip from outside.
The method of the invention further includes steps after the step of attaching an adhesive tape on the second surface of the lead frame: attaching at least one semiconductor chip with peripheral pads to a predetermined position of the first surface of the lead frame, electrically connecting the at least one semiconductor chip with peripheral pads to the lead frame, and performing a molding process to form a resin molded block for covering the at least one semiconductor chip with peripheral pads. The semiconductor chip attached to the first surface of the lead frame can be a semiconductor chip with peripheral pads or a stacked structure having another semiconductor chip s
Corless Peter F.
Cruz Lourdes
Edwards & Angell LLP
Jensen Steven M.
Siliconware Precision Industries Co. Ltd.
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