Method for manufacturing a DRAM with increased electrode surface

Details Method for manufacturing a DRAM with increased electrode surface Method for manufacturing a DRAM with increased electrode surface

1996-10-07

1998-10-13

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438240, 438253, 438397, H01L 218242, H01L 2120

Patent

active

058211390

ABSTRACT:
A method of forming a capacitor on a semiconductor substrate includes forming a first silicon oxide layer on the semiconductor substrate. A first photoresist is patterned on the first silicon oxide layer. An etching step is used to etch the first dielectric layer to form a hole in the first silicon oxide layer that is aligned with a source/drain region in the substrate. Then the first photoresist is removed. A second photoresist is patterned on the first silicon oxide layer. The opening of the photoresist is wider than the opening of the hole. The first silicon oxide layer is etched using the second photoresist as an etching mask to form a contact hole. A first polysilicon layer is formed on the first silicon oxide layer and in the contact hole. Then a second silicon oxide layer is deposited on the first polysilicon layer. An anisotropic etching is performed to etch the second silicon oxide layer. Then a second polysilicon layer is formed on the first silicon oxide layer, the first polysilicon layer, the second silicon oxide layer. Then a patterning and an etching processes are used to etch the second polysilicon layer. The first oxide layer and the second oxide layer is removed by using a highly selective etching to form a bottom storage node of the capacitor.

REFERENCES:
patent: 5340763 (1994-08-01), Dennison
patent: 5405796 (1995-04-01), Jones, Jr.
patent: 5552334 (1996-09-01), Tseng

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