Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-05-15
2003-04-01
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S251000, C438S253000, C438S589000
Reexamination Certificate
active
06541336
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of semiconductor device fabrication; more specifically, it relates to a method of fabricating a bipolar transistor having a realigned emitter.
BACKGROUND OF THE INVENTION
Bipolar transistors and especially SiGe bipolar transistors are growing in importance in the electronics industry because of their very high performance. However, fabrication of bipolar transistors presents some challenges especially in the fabrication of bipolar transistors having realigned emitters. A key problem in fabrication of bipolar transistors having realigned emitters is the elimination of native oxide layers formed in emitter openings prior to deposition of the emitter layer. Native oxides are thin oxide layers that grow at room temperature on freshly formed or freshly cleaned silicon surfaces upon exposure to oxygen in the air.
One obvious approach to the problem of native oxide growth in the emitter opening is to severely restrict the time delay allowed between pre-epitaxial cleaning processes and epitaxial growth to a preset range. This adds significant costs in logistics and scrap when the time window is exceeded and the time range leads to variations in performance from lot to lot because the native oxide is still present in a range of thicknesses and continuity.
Therefore, there is a need in the industry for a method to reduce the cost of logistics and scrap when the time window is exceeded and when the time range leads to variations in performance from lot to lot because of the native oxide growth.
SUMMARY OF THE INVENTION
A first aspect of the present invention is a method of fabricating a bipolar transistor, comprising: forming an emitter opening in a dielectric layer to expose a surface of a base layer; performing a clean of the exposed surface, the clean removing any oxide present on the surface and passivating the surface to inhibit oxide growth; and forming an emitter layer on the surface after performing a clean.
A second aspect of the present invention is a method of fabricating a bipolar transistor comprising; providing a substrate; forming a collector in the substrate; forming a base layer over the collector, the base layer including an intrinsic base region, the intrinsic base region including a SiGe layer; forming a dielectric layer over the intrinsic base region; forming an emitter opening in the dielectric layer to expose a surface of the intrinsic base region; and performing a clean of the exposed surface, the clean removing any oxide present on the surface and passivating the surface to inhibit oxide growth; and forming an emitter layer on the surface after the performing a clean.
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Cantell Marc W.
Chopdekar Rajesh
Geiss Peter J.
Sabo William D.
Schmeiser Olsen & Watts
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