Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-05-24
2003-09-23
Whitehead, Jr., Carl (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S324000, C257S392000, C257S411000
Reexamination Certificate
active
06624468
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device including insulated gate field effect transistors (hereinafter called the “IGFET”) and a method of manufacturing the same, and particularly to a semiconductor device including a plurality of IGFETs made of different gate insulating films and a method of such a semiconductor device. More specifically, the invention relates to a semiconductor device including at least a non-volatile memory circuit and a logic circuit mounted on a single substrate.
2. Description of the Related Art
Research and development have been made for a semiconductor device in which a non-volatile memory circuit and a logic circuit are integrated on a single substrate in order to enable free updating of stored information and high integration of circuits.
Non-volatile memory elements (memory cells) of non-volatile memory circuit having a two-layer electrode structure, and a non-volatile memory elements are made of a metal oxide semiconductor field effect transistor (called “MOSFET” hereinafter) which includes a charge storing gate electrode (a floating gate electrode) and a control gate electrode. The floating gate electrode is arranged on a tunnel insulating film formed on a channel forming region (a semiconductor substrate or a well region). The control gate electrode is arranged on an intermediate gate insulating film formed on a charge storing gate electrode.
The tunnel insulating film has been usually made of a pure silicon oxide film (SiO
2
) formed by thermal oxidation. Recently, an oxynitride film, which is produced by doping nitride atoms into a silicon oxide film through thermal nitridation, is often used as the tunnel insulating film. In the latter case, non-dangling bonds of the silicon oxide film, which result in hole trap caused by FN (Fowler-Nordheim) stress, are filled with nitride atoms, so that a fluctuation of current can be reduced compared with a pure silicon oxide film (tunnel insulating film) when a constant current is introduced. In other words, a non-volatile memory element can use a tunnel insulating film made of oxynitride, thereby improving charge storing performance after writing or erasing information.
On the other hand, the logic circuit is constituted by a complementary MOSFET which is effective in reducing power consumption. In the complementary MOSFET, an n-channel MOSFET and a p-channel MOSFET have gate electrodes arranged at channel forming regions via gate insulating films. The gate insulating films are formed of pure silicon oxide films produced by the thermal oxidation.
Recently, the complementary MOSFET has the gate insulating film which is thinned for the purpose of minimization, and tends to adopt a dual gate electrode structure in order to suppress short channel effects accompanying the minimization. In the dual gate electrode structure, the gate electrode of the n-channel MOSFET is designed to have n-type conductivity, and the gate electrode of the p-channel MOSFET is designed to have the p-type conductivity. For example, arsenic (As) is used in order to obtain the n-channel MOSFET while boron (B) is used to obtain the p-channel MOSFET. As is an n-type impurity forming a source region and a drain region of the n-channel MOSFET, and can be doped into the gate electrode while the source and drain regions are being formed, which enables the n-type gate electrode to be produced without increasing the number of manufacturing steps. Further, B is p-type impurities used for forming source and drain regions in the p-channel MOSFET, and is doped into the gate electrode during the formation of the source and drain regions. This also enables the p-type gate electrode to be produced without an increase in the manufacturing steps.
With the foregoing dual gate electrode structure, B has a high diffusion speed, and leaks and diffuses into the channel forming region through the gate insulating film, which causes fluctuation of a threshold voltage. Especially, thinning of the gate insulated film tends to promote leakage of B. In order to overcome this technical problem, use of a gate insulating film including a minute oxynitride layer is being reviewed in order to prevent diffusion of B at least onto a surface layer.
The following matters have not been considered in a semiconductor device including the foregoing non-volatile memory circuit and logic circuit.
(1) In the non-volatile memory circuit, it is preferable to uniformly dope high density nitride atoms into a tunnel insulating film of a non-volatile memory element in order to reduce non-dangling bonds and improve charge storing capability. The non-volatile memory element of the non-volatile memory circuit should have one charge storing gate electrode and one control gate electrode while a complementary MOSFET of the logic circuit should have one gate electrode. When three gate electrode are simply laid in three layers, the number of manufacturing steps will be increased, and yield of manufactured products may be reduced. In order to overcome this problem, the charge storing gate electrode of the non-volatile memory element is prepared beforehand, and the control gate electrode of the non-volatile memory element and the gate electrode of the complementary MOSFET are formed in the same manufacturing step. In other words, a total of two gate electrodes are formed.
In the last mentioned method, the tunnel insulating film having a high nitride atom density is removed from the regions where the non-volatile memory element and the complementary MOSFET have been prepared. However, silicon nitride layers are produced in an interface between the tunnel insulating film and the semiconductor substrate or the well region under the tunnel insulating film due to combination of nitride atoms of the tunnel insulating film, and silicon atoms of a semiconductor substrate or a well region. The foregoing silicon nitride layers cannot be reliably removed. As a result, it has been very difficult to produce the gate insulating film having excellent quality.
(2) The nitride atom density may be lowered in order to reliably remove the tunnel insulating film from the complementary MOSFET forming region, which adversely causes an increase in the number of non-dangling bonds in the tunnel insulating film for the non-volatile memory element, and reduction in the charge storing performance of the non-volatile memory element.
(3) In order to form gate electrode layer in two layers, the charge storing gate electrode of the non-volatile memory element and the gate electrode of the complementary MOSFET are manufactured in the same step, and the control gate electrode of the non-volatile memory element is produced thereafter in another step. However, impurities for adjusting threshold voltages are doped into the channel forming region prior to formation of the gate electrode of the complementary MOSFET, and then a high temperature annealing process is carried out in a step for forming an intermediate insulating gate film of the non-volatile memory element, so that the impurities may be extensively diffused more than necessary. Further, in the foregoing dual gate structure, B doped into the gate electrode of the p-channel MOSFET extensively diffuses and leaks. As a result, there has been a problem in that the threshold voltage of the complementary MOSFET, particularly p-channel MOSFET, is very difficult to control.
SUMMARY OF THE INVENTION
The present invention has been contemplated in order to overcome the foregoing problems of the related art. It is a first object of the invention to provide a semiconductor device which includes an insulated gate field effect transistor (IGFET) suitable as a non-volatile memory element having excellent charge storing capability, and an IGFET suitable as a logic element for stabilizing a threshold voltage.
A second object of the invention is to provide a method of manufacturing the foregoing semiconductor device.
A third object of the invention is to provide a method of manufacturing a semiconductor device including a
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Jr. Carl Whitehead
Kabushiki Kaisha Toshiba
Smoot Stephen W.
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