Module with bumps for connection and support

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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Details

C257S417000, C257S528000, C257S492000, C257S778000, C438S051000, C216S002000

Reexamination Certificate

active

06614110

ABSTRACT:

FIELD OF THE INVENTION
This invention is related to the fields of electronic interconnections for electronic devices including semiconductor devices, integrated circuits, application specific integrated circuits and electromechanical devices.
BACKGROUND OF THE INVENTION
Pace, in U.S. Pat. Nos. 5,627,406, 5,793,105, 5,866,441, 5,904,499 and 6,165,820 has disclosed electronic packaging modules for inverted bonding of electronic devices, semiconductor devices, integrated circuits and application specific integrated circuits, and methods of making the modules. The modules are characterized by a substrate or base having a conductive pattern with soft, ductile, metal protuberances on the conductive pattern; and the protuberances being capable of being metallurgically bonded to the input/output pads of electronic devices.
The Controlled Collapse Chip Connection (C4) is a method of flip chip mounting of semiconductor chips. In the C4 process solder bumps are formed on a semiconductor chip. The solder bumps are used to connect the chip to its package, such as a single chip module (SCM) or multichip module (MCM).
The C4 process has been used by only a few large volume manufacturers because it requires specially designed integrated circuits. The contacts of integrated circuits for the C4 process are in a grid over the surface of the chip, not on the perimeter as in the usual integrated circuit. Also the chips must be specially prepared for the user by the integrated circuit manufacturer with a thin layer of chromium and 0.1 mm (4 mil) high bumps of 97 Pb/3 Sn solder over the contacts.
SUMMARY OF THE INVENTION
In one aspect the invention is an electronic device package comprising the device and a rigid, insulating substrate which has a conductive pattern. The conductive pattern is electrically connected to the device by soft, ductile, metal protuberances protruding from the conductive pattern of the substrate.
An embodiment of the invention is a circuit module as a first level package for a semiconductor device. The module has a rigid, planar, insulating substrate that has a metallic, conductive pattern of one or more conductive pattern layers. The conductive pattern comprises thick or thin film metal layers. Each conductive pattern layer has an insulating layer over it. The conductive pattern layers are interconnected by metal filled vias in the insulating layers. The substrate has metal contacts that are connected to the conductive pattern, and are capable of making electrical connection to another electronic package or a higher level of electronic packaging. This embodiment of the invention is characterized by an outermost conductive pattern layer, having metal protuberances thereon, the protuberances rising above the surface of the layer, and the protuberances being a soft, ductile metal capable of being metallurgically bonded to the input/output pads of a semiconductor device. The metal protuberances provide connections to input/output pads of a semiconductor device and from the device to the conductive pattern of the electronic packaging module and through the metal contacts to another module or the next level electronic package.
In another embodiment, the invention is an electronic packaging module or circuit module for semiconductor devices. The base of the module is a planar, insulating substrate. The substrate has a metallic, conductive pattern. The conductive pattern has one or more conductive pattern layers. The conductive pattern layers are formed from either thick or thin film layers, or a combination of thick film layers and thin film layers. The substrate also has metal contacts connected to the conductive pattern, and capable of making electrical connection to another electronic package or a higher level of electronic packaging. The layers of the conductive pattern are separated by insulating layers, and the conductive pattern layers are interconnected by metal filled vias in the insulating layers. The outermost, conductive pattern layer has metal protuberances protruding above the surface of the layer. The protuberances are made of a soft, ductile metal capable of being metallurgically bonded to the input/output pads of a semiconductor device or integrated circuit chip, and are capable of providing input/output connections for semiconductor devices through the connections to the conductive pattern of the package or circuit module and through the metal contacts to another electronic package or the next level electronic package.
In another embodiment, the invention is a module that employs as a base a ceramic or glass/ceramic substrate having a standard pattern of conductive feed-throughs. One side of the base is provided with contact pads, balls or pins connected to the feed-throughs, and the other side of the base is provided with a conductive pattern of one or more conductive pattern layers. Selected feed-throughs required by a custom module design are connected to the conductive pattern and feed-throughs not used in the custom module design are isolated by coating with an insulating layer. The conductive pattern is covered with an insulating layer of a dielectric composition. Laser ablation forms openings in the insulating layer covering the conductive pattern. The openings are made in a pattern corresponding to the input/output pads of one or more semiconductor devices or integrated circuit chips. Soft ductile metal is plated into the openings and forms protuberances above the fired layer. The semiconductor devices are metallurgically bonded to the protuberances, making connection through the protuberances to the conductive pattern and through the feed-throughs to the contact pads, balls or pins on the substrate.
In yet another embodiment, the electronic packaging module is a SCM, single chip module with high packaging efficiency. The high packaging efficiency arises since the SCM may be less than 6 mm (0.15 in.) wider than the bare integrated circuit die. The SCM is composed of a planar base with conductive feed-throughs in the base. On one side of the base the conductive feed-throughs are joined to a ball, column, land, or pin grid array. On the other side the feed-throughs are connected to a conductive pattern of thick and/or thin film metal layers. The conductive pattern layers are separated by insulating layers. The topmost, insulating layer has metal filled openings in it. The metal in the openings connects to underlying conductive pattern layer below, and ends above in soft, ductile metal protuberances protruding above the surface of the insulating layer. The protuberances are metallurgically bonded to the input/output pads of a semiconductor device or integrated circuit die. The semiconductor device is connected through the protuberances and the conductive pattern of the module and the feed-throughs of the substrate to a grid array of metal contacts underneath the die, and the area of the substrate having the grid array is inside the perimeter of the integrated circuit chip.
The present invention is also an improved method of forming bumped substrates having metal protuberances suitable for bonding to the input/out pads (I/O's) of semiconductor, electronic and miniature electromechanical devices. The substrates have a conductive pattern. The conductive pattern includes basis metal pads which correspond to the I/O's of the devices.
A further embodiment of the invention is a method of making electrical connections to electro mechanical devices by means of metal protuberances on the conductive pattern of a ceramic substrate. The protuberances both support the device and electrically connect it.


REFERENCES:
patent: 4614194 (1986-09-01), Jones et al.
patent: 4814295 (1989-03-01), Mehta
patent: 4818728 (1989-04-01), Rai et al.
patent: 4874721 (1989-10-01), Kimura et al.
patent: 5111278 (1992-05-01), Eichelberger
patent: 5156997 (1992-10-01), Kumar et al.
patent: 5166773 (1992-11-01), Temple et al.
patent: 5186381 (1993-02-01), Kim
patent: 5216278 (1993-06-01), Lin et al.
patent: 5250469 (1993-10-01), Tanaka et al.
patent: 5252519 (1993-10-01), Nakatani

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