Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-06-13
1997-09-02
Chaudhari, Chandra
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438626, 438633, H01L 21469
Patent
active
056631081
ABSTRACT:
A new approach for creating metal pillar via structures, for multilevel metallization structures, used in the fabrication of MOSFET devices, has been developed. Consecutive metal depositions are performed, followed by a RIE procedure, used to create the desired first level metallization shape in the metallizations. Another RIE procedure than selectively forms the metal pillar via structure on the underlying first level metallization structure. Composite dielectric material, including a spin on glass layer, is used to fill the spaces between metal structures. Chemical mechanical polishing is used to create the desired planarity, followed by the construction of a second level metallization structure, contacting the underlying first level metallization structure by use of the metal pillar via structure.
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Chaudhari Chandra
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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