Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-11-24
2003-03-18
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S681000, C438S685000, C438S758000
Reexamination Certificate
active
06534404
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a method for depositing diffusion barriers for integrated circuit applications and particularly for copper interconnections. This invention is related to U.S. patent application Ser. No. 08/974,451, titled “Multilayer Diffusion Barriers,” Danek, et al., filed on Nov. 20, 1997 and assigned to Novellus Systems, Inc., now U.S. Pat. No. 5,942,799, issued Aug. 24, 1999, which is incorporated herein by reference in its entirety.
BACKGROUND OF THE INVENTION
Copper is widely recognized as an attractive replacement for aluminum as an interconnect conductor in integrated circuits. However, copper diffuses into silicon and intermetal dielectrics at the contact regions, causing device leakage and failure in manufacture or operation.
Ultrathin, highly conformal diffusion barriers are required for the manufacture of advanced integrated circuits with copper interconnections, to prevent copper diffusion into silicon and intermetal dielectrics. Conventional barrier materials, such as films of physical vapor deposition (PVD) Ta, TaN, or TiN and chemical vapor deposition (CVD) TiN, become unreliable at thicknesses below 50 Å because open grain boundaries result in fast copper diffusion through the barrier film. The diffusion at the grain boundaries is significantly accelerated under elevated temperature and electrical bias.
Grain boundary diffusion is a known failure mechanism for copper barriers (M. A. Nicolet Appl. Surface Sci. 91,269 (1995)). In order to improve barrier reliability, films of amorphous silicon nitride ternaries have been proposed (E. Kolowa et al., IEEE Elec. Dev. Lett. 12,321 (1991); J. S. Reid et al., J. Mater. Res. 7,2424 (1992); E. Kolowa et al., Thin Solid Films 236,301 (1993); J. S. Reid, et al., Thin Solid Films 262,218 (1995); P. M. Smith et al., VMIC, 6/18-6/20, 1996; X. Sun et al., J. Appl. Phys. 81,664 (1997)). Though the ternary films show excellent barrier properties, their resistivity is high, typically 1000-10000 &mgr;&OHgr; cm. In addition, the stoichiometry of ternary barrier films is difficult to control and leads to variations in electrical and barrier properties across the wafer as well as across the device features.
Post deposition silane treatment has been described as a method for improving the stability and the electrical properties of CVD titanium carbonitride [TiN(C)] (J. P. Lu, et al., presented at Advanced Metalization and Interconnect Systems for ULSI, Boston, 1996; J. P. Lu et al., Spring MRS Meeting '98, San Francisco, 1998). In this method, the starting material is porous and highly reactive TiN(C). During the treatment, XPS spectroscopy reveals silane reacting within the bulk of the film to form an insulating SiNe phase. Thus, despite improvement in the film stability, silane-treated films still suffer from high resistivity, about 2,000 &mgr;&OHgr; Q cm. Subsequent N
2
/H
2
plasma treatment has been attempted to correct this problem.
What is needed in the art is a method of depositing a diffusion barrier that incorporates silicon into the grain boundaries in order to suppress copper diffusion, but does not form high resistivity silicon nitride ternaries.
SUMMARY OF THE INVENTION
In accordance with the invention, a barrier film is deposited on a semiconductor wafer by alternating chemical vapor deposition of a film of binary transition metal nitride and in-situ thermal treatment of the deposited film in a gas containing silicon. The treatment step is done under low pressure and results in formation of an ultrathin layer of silicon rich material at the exposed interface. This layer blocks the film grain boundaries and prevents diffusion of the conductor metal, specifically copper, into the underlying substrate and the surrounding intermetal dielectric. Since the formation of the silicon rich layer is self-limiting, its thickness is only a few angstroms. Thus, the overall electrical properties of the barrier are unaffected.
In a preferred embodiment, a TiN film is deposited from tetrakis (dimethylamido) titanium and ammonia in a conventional multistation deposition system (for example, Novellus Systems' CVD TiN Prism) or in a single-station deposition system (for example, Novellus Systems' CVD TiN Inova). The thickness of each layer is 10-200 Å, preferably 50 Å. After the TiN film is deposited, the flow of the precursors is discontinued, and the reactor is purged with nitrogen. The surface of the film is then treated with silane for 5-60 seconds, preferably 10 seconds, at pressure 0.1-100 Torr, preferably 2 Torr. After completion of the silane treatment, the reactor is again purged with nitrogen, and the wafer is transferred to the next pedestal. The sequence is repeated until the desired number of layers has been formed. This sequential deposition produces a TiN(Si) film with 1-10 layers, preferably 6. The top TiN sublayer may be silane treated or left as deposited. The post deposition treatment in silane eliminates direct formation of the high resistivity ternary phases. The formation of TiN(Si) is limited to the grain boundaries and does not affect the overall film sheet resistance. The silicon rich layer suppresses copper diffusion without affecting conductivity.
In another preferred embodiment the deposition and treatment of the film are performed in a conventional CVD chamber with one deposition station, known as a single wafer module. The process sequence is similar to that in the first embodiment with the exception that the wafer remains on the same pedestal during processing. The sequential process yields multilayer TiN(Si) film. The number of the layers is 1-10, preferably 1 or 2.
Variants of these embodiments can be obtained by treating other transition metal nitrides, such as CVD TaN or CVD WN
x
with silane or other silicon containing gases, such as Si
2
H
6
, Si
3
H
6
, SiH
n
X
4−n
, where X is a halide.
Another advantage of the invention is that it improves copper wetability of the film surface. This is potentially important for improving copper adhesion and damascene trench fill.
It has been found that the treated TiN film is less susceptible to surface oxidation. This effect may be also important for improving properties of CVD TiN for CVD W plug applications.
Potential applications of the invention include the formation of diffusion barriers for copper interconnects, W-plugs, and DRAM capacitors.
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K.K. Shih et al., “Ti/Ti-N Hf/Hf-N and W/W-N multilayer films with high mechanical hardness,” Appl. Phys. Lettt. 61(6), Aug. 10, 1992, pp. 654-656.
Chang Woo Lee et al., “Stress relaxation in plasma deposited tungsten nitride/tungsten bilayer,” Appl. Phys. Lett. 65(8), Aug. 22, 1994, pp. 965-967.
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J. P. Lu et al., “A New Method for Processing TiN-based Barrier Films through Thermal Decomposition of TDMAT Combined with Post-deposition Silane Anneal,” Advanced Metallization and Interconnect Systems for ULSI Applications; Oct. 1996, Boston; Proceedings, pp. 45-48.
Choe Hyoun S.
Danek Michal
Levy Karl B.
Lebentritt Michael S.
Novellus Systems Inc.
Skjerven Morrill LLP
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