Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-03-16
2003-09-02
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S486000, C257S750000, C257S757000, C257S763000
Reexamination Certificate
active
06614083
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a circuit comprising a thin film transistor (hereinafter referred to as TFT). For example, the present invention relates to an electro-optical device, typically a liquid crystal display device, and an electronic device with an electro-optical device installed as a component.
Note that through this specification, a semiconductor device indicates general devices that can function by using semiconductor characteristics, and that electro-optical devices, semiconductor circuits, and electronic devices are all categorized as semiconductor devices.
2. Description of the Related Art
Techniques for using semiconductor thin films (with a thickness on the order of several nm to several hundreds of nm) formed on a substrate having an insulating surface to structure a thin film transistor (TFT) have been in the spotlight in recent years. Thin film transistors are widely applied to electronic devices such as ICs and electro-optical devices, and the rapid development thereof as switching elements for image display devices is desired.
For example, the application of TFTs is being attempted in every electric circuit in a liquid crystal display device, such as pixel matrix circuits that control each of the pixels, arranged in a matrix shape, driver circuits that control the pixel matrix circuits, and in addition, logic circuits (such as processor circuits and memory circuits) which process external data signals; in all electric circuits.
Conducting materials such as Al, Ta, and Ti are conventionally used as wiring materials for the above TFT, and among them aluminum that have low resistivity is often used. However, when a TFT is manufactured by using aluminum as a wiring material, operation error or deterioration of TFT characteristics were caused by formation of projections such as hillocks or whiskers or by dissemination of aluminum atoms into the channel forming region, in the heat treatment.
SUMMARY OF THE INVENTION
As stated above, aluminum is not a preferable wiring material in the TFT manufacturing process because of its low heat resistance.
The present invention was brought forth considering such problem. It is an object of the present invention to provide an electrooptical device having high reliability by using a material that has efficiently low electric resistivity and is highly heat resistant for a wiring or an electrode of the circuits in the electrooptical device characterized by AM-LCD, and a manufacturing process therefor.
In order to solve the above stated objects, the present invention uses a target comprising highly purified high melting point metal, and provides a high melting point metal film obtained by sputtering for the wiring material. Specifically, the use of tungsten (W) as the high melting point metal is one of the characteristics of the present invention. In addition, as other high melting point metals., molybdenum (Mo), tantalum (Ta), chromium (Cr), niobium (Nb) or vanadium (V) may be used. Further, a eutectic alloy (molybdenum-tantalum alloy) with such other high melting point metals (molybdenum etc.) may be used.
A material of purity higher than 4N is used for the target, and a simple substance gas such as argon (Ar), krypton (Kr) or xenon (Xe), or a mixed gas of those gases may be used as the sputtering gas. In case of using simple substance gas of argon, it is preferable to prevent mixing of impurity element. Conditions such as sputtering power, gas pressure, or substrate temperature may be suitably controlled by the operator.
A high melting point metal film (tungsten) obtained as such includes scarce impurity elements, typically, amount of oxygen included could be reduced to no more than 30 parts per million (ppm), and an electric resistivity of 20 mW cm or less, typically 6-15 mW cm could be obtained. The stress of the film was −5×10
9
−5×10
9
dyn/cm
2
.
Further, the use of laminate structure of a high melting point metal film and a nitride of a high melting point metal film for the wiring of the semiconductor device is another characteristic of the present invention. For example, tungsten (W) is laminated on tungsten nitride (WNx (0<x<1)) after the tungsten nitride is formed on an insulating surface. A silicon film having conductivity (e.g. phosphorus doped silicon film, boron doped silicon film) may be disposed under the tungsten nitride (WNx) for improving close adhesion. The wiring can be formed at width of 5 &mgr;m or less, and the film thickness of 0.1-0.7 &mgr;m.
High melting point metals are not resistant against oxidation in general, and they are easily oxidized in a heat treatment in an atmosphere in the existence of remaining oxygen of few ppm. As a result, increase in the electric resistiity and film peeling may occur. Further, introduction of trace impurity element contained in the reactive gas into the high melting point metal at ion doping, such as oxygen may also increase the electric resistivity.
Therefore, the manufacturing method of TFT of the present invention is characterized by covering the surface of the high melting point metal with a nitride film by nitride treatment such as heat nitrification or plasma nitrification etc., before treating the substrate on which said high melting point metal films are disposed with heat. When a wiring having under layer of tungsten nitride (WNx) and upper layer of tungsten (W) is nitrided, the wiring may be in a structure in which tungsten film is covered by tungsten nitride (WNx) on the upper surface, the side face and the under surface.
When heat treatment is carried out after forming a passivation film comprising silicon nitride film or silicon nitride oxide film etc. in order to prevent oxidation, pin holes were generated and in some cases oxidation advanced into the tungsten film.
FIG. 25
shows a result of measuring the number of pin holes by surface inspecting apparatus (manufactured by Hitachi, GI-4600) per 100 mm
2
of a laminated films comprising under layer WNx (film thickness 30 nm) and upper layer W (thickness 120 nm) formed over a quartz substrate (127 mm×127 mm) after treating under conditions 1 through 4 shown below: Condition 1) After plasma nitrification treatment using ammonia gas and formation of silicon nitride film (film thickness 25 nm), heat treatment (550° C., 4 hours) Condition 2) After formation of silicon nitride film (thickness 25 nm), heat treatment (550° C., 4 hours)
Condition 3) After forming silicon nitride film (thickness 25 nm), silicon nitride oxide film is formed (thickness 200 nm) and heat treatment (550° C., 4 hours) Condition 4) silicon nitride oxide film is formed (thickness 200 nm) and heat treatment (550° C., 4 hours)
Conditions of film formation of WNx and W are shown in Table 1.
TABLE 1
WN sputtering
condition
W sputtering condition
Target
&phgr; 6 inch W 99.95%
<=
Temperature (° C.)
R.T.
<=
Sputtering pressure (Pa)
0.4
<=
Ar flow (sccm)
20
50
N
2
flow (sccm)
10
(None)
Sputtering current (A)
4
<=
T-S (mm)
Approx. 98
<=
Conditions of above stated plasma treatment and conditions of film formation of above stated silicon nitride film and silicon nitride oxide film SiO
x
N
y
(0<x, y<1) are shown in Table 2.
TABLE 2
Plasma
Items
treatment
SiN deposition
SiON deposition
Temperature (° C.)
325
<=
<=
Treatment pressure
0.7
<=
1.2
(Torr)
SiH
4
flow (sccm)
—
5
27
NH
3
flow (sccm)
38
38
900
N
2
flow (sccm)
—
87
—
RF electric power (W)
300
300
50
Gap (mm)
34
34
20
It was confirmed that the number of pinholes were remarkably decreased by plasma nitrification process using ammonia gas from FIG.
25
.
Further, it is another characteristic of the manufacturing process for TFT of the present invention to prevent introduction of impurity ion, specifically oxygen, ion into the wiring by covering at least the upper surface of the gate electrode with a mask when conducting ion doping for forming impurity regions. This mask may be a mask
Takayama Toru
Yamazaki Shunpei
Abraham Fetsum
Cook Alex McFarron Manzo Cummings & Mehler, Ltd.
Semiconductor Energy Laboratory Co,. Ltd.
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