Method of fabricating capacitors

Details Method of fabricating capacitors Method of fabricating capacitors

2001-12-27

2002-11-26

Tsai, Jey (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S238000

Reexamination Certificate

active

06486022

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory and, more particularly, to a capacitor in a semiconductor device and a method of fabricating a capacitor that provides both excellent electric characteristics and sufficient electric capacitance necessary for operation of the semiconductor device.
2. Background of the Related Art
As the degree of integration of memory products accelerates with the development of ever finer semiconductor imaging technology, unit cell areas have been greatly decreased and operating voltages have been decreased.
Despite the decreasing cell area and the reduced voltage, the minimum charge capacitance required for memory device operation has remained on the order of at least 25 fF/cell to prevent soft error generation and refresh time reduction.
In conventional DRAM capacitor utilizing a nitride/oxide (“NO”) layer structure as a dielectric, a lower electrode is constructed with a three-dimensional structure and/or with increased height, thereby increasing the effective surface area to provide sufficient charge capacitance.
However, the extent to which a three-dimensional lower electrode can be employed to increase charge capacitance is limited as a result of process difficulties.
Moreover, increasing the height of the lower electrode results in an increasing step difference between cell and peripheral circuit areas, eventually degrading the integration process after the wire formation due to an inability to achieve a sufficient depth of focus during subsequent exposure processes.
Therefore, a capacitor having the NO structure of the conventional art fails to provide the charge capacitance required for a next generation DRAM device of over 256M memory cells.
Lately, the development of Ta
2
O
5
capacitors, which use Ta
2
O
5
films having dielectric constants k typically ranging from 25 to 27, instead of NO films having dielectric constants ranging 4 to 5, are made so as to overcome some of the shortcomings of NO capacitors.
In view of these aspects, a capacitor in a semiconductor device and a fabrication method thereof according to a conventional prior art method are explained with reference to
FIGS. 1-3
.
FIG. 1
shows a cross-sectional view of a capacitor using a Ta
2
O
5
film as a dielectric layer regarding a capacitor in a semiconductor device and fabrication method thereof according to a related art.
FIG. 2
shows oxygen vacancies and carbon impurities existing in a Ta
2
O
5
dielectric film are removed by oxygen radicals during thermal treatment after formation of the Ta
2
O
5
dielectric film during the fabrication of a capacitor according to conventional prior art method.
FIG. 3
is a SEM photo showing a cross-sectional view of a capacitor in which an N
2
O thermal treatment (oxidation treatment) process was performed after the deposition of a Ta
2
O
5
film to form a capacitor dielectric in a semiconductor device according to a conventional prior art method.
Referring to
FIG. 1
, an insulating interlayer
3
is formed on a semiconductor substrate
1
. A portion of the semiconductor substrate
1
is exposed by patterning and etching the insulating interlayer
3
. A doped polysilicon layer is then deposited on the insulating interlayer
3
and the exposed semiconductor substrate
1
. A lower electrode
5
is then formed by patterning and etching the doped polysilicon layer.
After a Ta
2
O
5
film
7
has been formed on an upper surface of the insulating interlayer
3
and on the exposed surfaces of the lower electrode
5
, an upper electrode
9
is formed by stacking TiN and doped polysilicon on the Ta
2
O
5
film
7
to complete the fabrication of the capacitor.
Because the Ta
2
O
5
film
7
of the capacitor according to the conventional art methods, as represented in
FIG. 2
, has an unstable stoichiometric ratio, substitution type Ta atoms exist in the film as a result of the difference in the composition ratio between Ta and O.
Namely, it is inevitable that substitution type Ta atoms having an oxygen vacancy state exist locally in the film due to the unstable chemical composition ratio of the material itself.
Further, although the number of the oxygen vacancies in the Ta
2
O
5
film may vary locally in accordance with the contents of the components and their bonding degree, they will exist to some degree.
Therefore, in order to prevent or reduce the leakage current of the resulting capacitor an additional oxidation process is required in which the substitution type Ta atoms remaining in a dielectric film are oxidized by stabilize the stoichiometric ratio of the Ta
2
O
5
film. Moreover, the Ta
2
O
5
film has a high oxidation reactivity with polysilicon (oxide based electrode) or TiN (metal based electrodes) used for upper and lower electrodes, thereby forming a low dielectric oxide layer and greatly reducing the homogeneity at an interface as a result of the migration of oxygen in the film to the interface.
When the film is formed, carbon atoms, carbon compounds such as CH
4
, C
2
H
4
and the like, and H
2
O are produced as impurities by the reaction between organic portions of Ta(OC
2
H
5
)
5
and then O
2
or N
2
O gas used to form the Ta
2
O
5
film.
Consequently, oxygen vacancies as well as carbon atoms, ions, and radicals existing in the Ta
2
O
5
film as impurities increase the leakage current of the capacitor and degrade the dielectric characteristics of the resulting device.
In order to address these impurities, a subsequent thermal treatment (oxidation) in an electrical furnace or RTP in N
2
O or O
2
ambient has been used to overcome these problems.
However, in the subsequent treatments of the prior art methods, as shown in
FIG. 3
, an oxygen radical (O
+
) component as an oxidizer diffuses into an interface between the doped polysilicon layer, used as the electric charge storage electrode, and the Ta
2
O
5
dielectric layer forms an oxide (SiO
2
) layer having a low dielectric constant thus increasing the equivalent oxide layer thickness (T
ox
) of the resulting capacitor.
As shown in
FIG. 3
, it is practically unable to attain a value under T
ox
=30 Å due to the existence of the oxide layer about 25 to 35 Å thick at the interface even though Ta
2
O
5
has a relatively high dielectric constant (k=25).
Therefore, a capacitor using the prior art Ta
2
O
5
dielectric layer fails to provide a charge capacitance more than about 1.5 times larger than that of an NO capacitor of equal area.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a capacitor for a semiconductor device and a method of fabricating such capacitors that substantially obviates one or more of the problems arising from the limitations and disadvantages of the related art.
An object of the present invention is to provide a capacitor for a semiconductor device and a method of fabricating such capacitors that provide excellent electrical characteristics as well as provide sufficient charge capacitance for high density semiconductor devices.
Another object of the present invention is to provide a capacitor for a semiconductor device and a method of fabricating such capacitors provides sufficient electric charge capacitance for use in a highly-integrated device using charge storage electrode having a simple stacked or concave structure, thereby reducing product cost by decreasing the number of unit processes and unit process times necessary to form the capacitor.
A further object of the present invention is to provide a capacitor for a semi-conductor device and a method of fabricating such capacitors that provide a capacitor having a dielectric film having a dielectric constant that is higher and a stoichiometric ratio that is more stable than conventional Ta
2
O
5
, using LPCVD.
Another further object of the present invention is to provide a capacitor for a semiconductor device and a method of fabricating such capacitors using low temperature plasma oxidation treatment prevents a low dielectric oxide layer from being formed at the interface betwee

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