Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2000-10-18
2002-06-25
Sherry, Michael J. (Department: 2829)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
Reexamination Certificate
active
06410463
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to a semiconductor technique and more particularly to a film with a low dielectric constant (referred to as “low-k”) formed on a semiconductor substrate by using a plasma CVD (chemical vapor deposition) apparatus.
2. Description of the Related Art
Because of the recent rise in requirements for the large-scale integration of semiconductor devices, a multi-layered wiring technique attracts a great deal of attention. In these multi-layered structures, however, capacitance among individual wires hinders high-speed operations. In order to reduce the capacitance it is necessary to reduce relative dielectric constant of the insulation film. Thus, various materials having a relatively low relative dielectric constant have been developed for insulation films. Further, a hard mask such as SiN is used in formation of a semiconductor structure, but such a film has a relative dielectric constant of around 8. It is also preferable for hard masks to have a low dielectric constant.
Conventionally, such films are formed by a plasma CVD method and a spin-coat method. However, the spin-coat method has a problem in that a material cannot be applied onto a silicon substrate evenly and another problem in which a cure system after the coating process is costly. In the plasma CVD method, a liquid material (e.g., P-TMOS, phenyl trimethoxysilane) is used, and the material is subjected to vaporization by a bubbling method. The babbling method means a method wherein vapor of a liquid material, which is obtained by having a carrier gas such as argon gas pass through the material, is introduced into a reaction chamber with the carrier gas. This method generally requires a large amount of a carrier gas in order to cause the material gas to flow. The relative dielectric constant cannot be low.
Further, in addition to the above films, silicon oxide films SiO
x
are conventionally used as an insulation film. However, the silicon oxide films have a relative dielectric constant of about 4.0.
SUMMARY OF THE INVENTION
It is, therefore, a principal objective of the present invention to provide a method for forming a film that has a low relative dielectric constant, high thermal stability, high humidity-resistance and high adhesive strength.
It is another objective of the present invention to provide a method for easily forming an insulation film that has a low relative dielectric constant without requiring an expensive device.
According to an aspect of the present invention, in a method for forming in a reactor a film having a low relative dielectric constant on a semiconductor substrate by plasma reaction, the improvement comprises lengthening a residence time, Rt, of a reaction gas in the reactor, wherein 100 msec≦Rt,
Rt[s]=
9.42×10
7
(
Pr·Ts/Ps·Tr
)
r
w
2
d/F
wherein:
Pr: reaction chamber pressure (Pa)
Ps: standard atmospheric pressure (Pa)
Tr: average temperature of the reaction gas (K)
Ts: standard temperature (K)
r
w
: radius of the silicon substrate (m)
d: space between the silicon substrate and the upper electrode (m)
F: total flow volume of the reaction gas (sccm).
In the above, Rt can be lengthened by (i) reducing a flow of the reaction gas, (ii) enlarging the reaction space, or (iii) increasing the reaction pressure, for example.
In an embodiment, the reaction gas to form a low-k film comprises at least one selected from the group consisting of Si(CH
3
)
n
H
4−n
(n=1-4), Si
2
(CH
3
)
n
H
6−n
(n=1-6), C
5
F
5
, C
6
F
n
(n=6-12), C
n
F
2n+2
(n>1), CH
n
F
4−n
(n=
1-4), Si
x
F
2x+2
(x=1-4), SiH
n
F
4−n
(n=1-4), Si
n
H
2n+2
(n=1-3), Si(OC
n
H
2n+1
)
4
(n=1-2), and SiF(OC
n
H
2n+1
)
3
(n=1-2).
In another embodiment, the reaction gas to form a low-k film comprises at least one selected from the group consisting of Si
&agr;
O
&agr;−1
R
2&agr;−&bgr;+2
(OC
n
H
2n+1
)
&bgr;
, wherein R is a hydrocarbon, &agr; and &bgr; are an integer, including Si
&agr;
(CH
3
)
2
(OCH
3
)
2
, in combination with at least one selected from the group consisting of C
5
F
5
, C
6
F
n
(n=6-12), C
n
F
2n+2
(n≧1), CH
n
F
4−n
(n=1-4), Si
x
F
2x+2
(x=1-4), and SiH
n
F
4−n
(n=1-4).
In still another embodiment, the reaction gas to form a low-k hard mask such as a SiC, SiCH, SiNC, or SiNCH film comprises at least one compound selected from the group consisting of Si(CH
3
)
n
H
4−n
(n=1-4), Si
2
(CH
3
)
n
H
6−n
(n=1-6), (CH
3
)
3
SiNHSi(CH
3
)
3
, and (CH
3
)
3
SiNCH
3
Si(CH
3
)
3
.
In an embodiment, the present invention may include the following steps for forming an insulation film on a semiconductor substrate by plasma treatment:
introducing a material gas into a reaction chamber for plasma CVD process wherein a semiconductor substrate is placed;
introducing a carrier gas; and
activating plasma reaction in the reaction chamber where a reaction gas composed of the material gas and the carrier gas is present, and forming a film having a low dielectric constant on the semiconductor substrate by controlling flow of the reaction gas to lengthen a residence time, Rt, of the reaction gas in the reaction chamber, wherein 100 msec≦Rt.
For purposes of summarizing the invention and the advantages achieved over the prior art, certain objects and advantages of the invention have been described above. Of course, it is to be understood that not necessarily all such objects or advantages may be achieved in accordance with any particular embodiment of the invention. Thus, for example, those skilled in the art will recognize that the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other objects or advantages as may be taught or suggested herein.
Further aspects, features and advantages of this invention will become apparent from the detailed description of the preferred embodiments which follow.
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IBM, “Voidless final closure process for polysilicon trench”, IBM Technical Disclosure Bulletin, vol. 28, No. 10, 3/86, p. 4594-5.
ASM Japan K.K.
Kilday Lisa
Knobbe Martens Olson and Bear LLP
Sherry Michael J.
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