Ferroelectric memory transistor with high-k gate insulator...

Details Ferroelectric memory transistor with high-k gate insulator... Ferroelectric memory transistor with high-k gate insulator...

2000-06-16

2002-07-16

Flynn, Nathan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S288000, C438S003000, C438S197000

Reexamination Certificate

active

06420742

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to semiconductor circuits and, in particular, to semiconductor ferroelectric memory devices and their method of manufacture.
BACKGROUND OF THE INVENTION
Ferroelectric memory cells that use ferroelectric memory films as gate insulators are increasingly used for high volume memory production. Recent advances in thin-film technology have produced nonvolatile ferroelectric memory devices which can perform high-speed read/write operations by using the polarization reversal and retention characteristics of the ferroelectric films.
Currently, there are two types of conventional ferroelectric memory devices: one which uses a transistor to detect the amount of charge stored in a capacitor, and one which detects a change in the resistance of a transistor caused by the spontaneous polarization of a ferroelectric material. The second type of conventional ferroelectric memory device typically has a single transistor, and no capacitor.
An example of the second type of ferroelectric memory device is a ferroelectric insulator semiconductor field-effect transistor (FET), which employs a ferroelectric film instead of the conventional gate insulating film, and in which the read-out operation is performed by forming an inversion layer in a channel region of the transistor. The inversion layer is formed by controlling the potential on a silicon interface based on the polarization retention of the ferroelectric film. This type of ferroelectric memory device provides a nondestructive read-out and, thus, increases the efficiency of read/write operations.
An example of a field-effect transistor
20
using a ferroelectric film for storing information is schematically illustrated in
FIGS. 1-2
. A ferroelectric film
15
, such as PZT (lead (Pb) zirconate titanite) or BaTiO
2
(barium titanite), is formed as a gate insulating film on a p-type silicon substrate
10
(FIG.
1
). Source and drain regions
12
having a high concentration of n-type impurity ions are also formed on the p-type silicon substrate
10
by well-known methods. A gate electrode
16
(
FIG. 1
) is formed over the ferroelectric film
15
.
When a positive write voltage (Vp) is applied to the gate electrode
16
, polarization of the ferroelectric film
15
occurs, as illustrated in FIG.
1
. That is, because of the charge displacement in the ferroelectric film
15
, electrons (minority carriers) are attracted to the surface of the p-type silicon substrate
10
, to form a channel
13
(FIG.
1
). Consequently, a conduction state occurs between the source and drain regions
12
. The polarization in the ferroelectric film
15
remains even after the write voltage (Vp) is removed. Accordingly, the conduction state formed by the channel
13
is also maintained after the write voltage Vp is removed.
In contrast, when a negative erase voltage (Vn) is applied to the gate electrode
16
(FIG.
2
), polarization opposite to that occurring for a positive write voltage (Vp) is brought about in the ferroelectric film
15
. In this case, the charge displacement in the ferroelectric film
15
is reversed and the channel
13
of
FIG. 1
disappears. Thus, a non-conduction state takes place between the source and drain regions
12
, which is maintained even after the negative erase voltage (Vn) is removed.
The field-effect transistor
20
of
FIGS. 1-2
which uses a ferroelectric material as the conventional gate insulating film may be used for storing information. As illustrated in
FIGS. 1-2
, both the write state (
FIG. 1
) and the erase state (
FIG. 2
) depend on the presence and absence, respectively, of the channel
13
. Since a transistor could be in either a conductive or non-conductive state, depending on the presence or absence of the channel
13
, any stored information can be read out by examining whether the transistor is conductive or non-conductive. Thus, information is stored in the ferroelectric film in the form of film polarization. Further, since the polarization of the ferroelectric film does not disappear even when the electric field is removed, the memory of the semiconductor device is nonvolatile.
Although ferroelectric memory transistors, such as the field-effect transistor
20
of
FIGS. 1-2
, are promising memory devices, there are still some drawbacks with the use of a ferroelectric film as a gate insulating layer.
One major drawback stems from the fact that a conventional ferroelectric memory device requires the deposition of the ferroelectric film directly on a semiconductor layer, such as silicon (Si) or gallium arsenide (GaAs). When a ferroelectric film, such as the ferroelectric film
15
(FIGS.
1
-
2
), formed typically of PZT or BaTiO
3
, is deposited directly on the silicon substrate
10
, metals such as Pb (from PZT) or Ba (from BaTiO
3
) diffuse into the surface of the silicon substrate
10
. In addition, oxygen from the oxygen-rich ferroelectric film
15
may also diffuse at the silicon-ferroelectric interface, forming a superfluous thin film, for example, of SiO
2
. Thus, electric charges may be trapped at the silicon-ferroelectric interface by defects that are created by the metal and/or oxygen diffusion. When such trapping of electric charges occurs, the operation of the ferroelectric field-effect transistor
20
becomes unstable, the charge produced by the polarization retention may be erased, and the overall characteristics of the semiconductor device may be altered.
Further, the deposition of the ferroelectric film
15
(
FIGS. 1-2
) on the silicon substrate
10
typically requires deposition temperatures higher than 500° C. The high-temperature treatments tend to further facilitate the diffusion of the ferroelectric constituents at the silicon-ferroelectric interface.
Accordingly, since a ferroelectric film is not compatible with a silicon substrate in terms of thermal expansion coefficient and lattice structure, it is very difficult to form a high-quality ferroelectric film on the silicon substrate. This difficulty is augmented by the fact that the formation of the source and drain regions typically requires temperatures of approximately 1000° C., and the conventional ferroelectric films are not capable of sustaining such high temperatures.
Various efforts have been attempted by the semiconductor industry to address the drawbacks posed by placing ferroelectric films on a substrate. For example, more recent memory devices separate the ferroelectric film from the silicon substrate by using a gate oxide layer
11
(FIG.
3
), for example a SiO
2
layer, formed between the silicon substrate
10
and the ferroelectric film
15
. Further, a bottom programming conductor layer
13
and a top conductor layer
17
are formed below and above the ferroelectric film
15
to form a stacked gate structure
21
, as shown in FIG.
3
. Such gate structures overcome the problems posed by the silicon-ferroelectric interface explained above. Unfortunately, the bottom programming conductor
13
, which is interposed between the gate oxide layer
11
and the ferroelectric film
15
which is used to program the device without exceeding the breakdown voltage of the gate insulator, creates a conductive path through the transistor that is unnecessary for its operation.
Another drawback of such ferroelectric memory device is the difference in the permittivity of the ferroelectric film and that of the adjacent layers. If the stacked gate structure
21
of
FIG. 3
is viewed as a series of stacked capacitors
60
(FIG.
4
), which has layers of thicknesses comparable to those of the stacked gate structure
21
, then, a first capacitor C
1
(
FIG. 4
) corresponds to the ferroelectric film
15
(
FIG. 3
) and a second capacitor C
2
(
FIG. 4
) corresponds to the gate oxide layer
11
(FIG.
3
). Since typical ferroelectrics have an effective electric permittivity in a range of about 400 to about 2500, while the electric permittivity of silicon oxide is only of about 4, the capacitance of the first capacitor C
1
is much larger than the capacitance of the second capacitor C
2
. T

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