Method of fabricating a piezoresistive pressure sensor

Details Method of fabricating a piezoresistive pressure sensor Method of fabricating a piezoresistive pressure sensor

1999-09-23

2002-07-09

Whitehead, Jr., Carl (Department: 2822)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Physical stress responsive

C438S050000, C438S311000

Reexamination Certificate

active

06417021

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an integrated piezoresistive pressure sensor and relative fabrication method.
2. Discussion of the Related Art
In recent years, micromachining techniques have been developed for producing integrated micro pressure sensors of semiconductor material, which present numerous advantages as compared with traditional sensors: low cost; high degree of performance and reliability; better signal
oise ratio; integration with memory circuits for producing intelligent sensors; on-line self-testing; and greater reproducibility. As such, integrated micro pressure sensors are now being used increasingly in the automotive industry, in which they provide for greater safety and environmental protection with absolutely no increase in vehicle cost.
Currently marketed semiconductor micro pressure sensors are substantially based on two physical effects: a piezoresistive effect, whereby the pressure-induced inflection of a silicon diaphragm unbalances a Wheatstone bridge comprising resistors diffused in the diaphragm; and a capacitive effect, whereby pressure induces a shift in the position of a diaphragm forming the movable electrode of a capacitor (thus resulting in a variation in capacitance).
The present invention relates to a sensor implementing the first effect, i.e. to a piezoresistive sensor. At present, diaphragms of semiconductor material (silicon) are produced using the bulk micromachining technique, which is described in detail, for example, in articles “CMOS Integrated Silicon Pressure Sensor,” by T. Ishihara, K. Suzuki, S. Suwazono, M. Hirata and H. Tanigawa,
IEEE Journal Sol. St. Circuits
, Vol. sc-22, April 1987, pp. 151-156, and “Micromachining and ASIC Technology,” by A. M. Stoffel,
Microelectronics Journal
25 (1994) pp. 145-156.
For the sensor to operate effectively, the diaphragms should be of uniform, accurately controlled thickness with no intrinsic mechanical stress, which characteristics are achieved by forming the microstructures by plasma or wet etching, isotropic etching (for profiles coincident with the crystal faces) or anisotropic etching (for more sharply curved, continuous profiles). At present, the best etching method for producing the diaphragm, and which provides for more accurately controlling the thickness of the diaphragm and eliminating any process-induced tensile or compressive stress, is the electrochemical stop method using a PN junction whereby the diaphragm is formed in an N-type monocrystalline semiconductor layer (e.g. the epitaxial layer) on a P-type substrate; the N-type layer is masked except for a previously implanted anode contact region; the rear of the substrate is masked with a mask presenting a window aligned with the region in which the diaphragm is to be formed; a positive potential difference is applied between the N-type layer and the substrate via the anode contact region; and the P-type substrate is chemically etched for a few hours at low temperature (e.g. 90° C.). Etching terminates automatically at the PN junction, and the N-type layer at the removed substrate region forms the diaphragm.
An example of the fabrication steps of an absolute piezoresistive micro pressure sensor using the electrochemical stop method is described below with reference to
FIGS. 1
a
,
1
b
and
1
c.
The initial steps are those commonly adopted in the fabrication of integrated circuits. That is, commencing with a wafer
1
of monocrystalline silicon comprising a P-type substrate
2
and an N-type epitaxial layer
3
, P-type junction isolating regions
4
extending from the upper surface of wafer
1
to substrate
2
are formed in epitaxial layer
3
; the integrated circuit is then formed (
FIG. 1
a
shows an NPN transistor with an N
+
-type collector contact region
6
, a P-type base region
7
, and an N
+
-type emitter region
8
); and, simultaneously with the integrated circuit, the diffused resistors (only one of which, comprising a P-type resistive layer
10
, is shown) and one anode region for each wafer and each diaphragm (N
+
-type region
11
in
FIG. 1
a
) are formed. The resistors are preferably formed in the same step in which base region
7
of the NPN transistor is implanted; and anode region
11
is formed in the same step as one of the N-type regions of the integrated circuit (e.g. when implanting collector contact region
6
or emitter region
8
). A dielectric layer
12
is then deposited, and metal contacts
13
formed.
At this point, wafer
1
is masked with a front mask
15
and a rear mask
16
, the front mask
15
(of silicon oxide) covering the whole of the upper surface of wafer
1
except for a window at anode region
11
, and the rear mask
16
(of silicon nitride or oxide) covering the whole of the lower surface of the wafer except for the region in which the diaphragm is to be formed, as shown in
FIG. 1
b
. The rear of the wafer is then subjected to anisotropic etching; at the same time, epitaxial layer
3
is biased, via anode region
11
, at a positive voltage (e.g. 5 V) with respect to substrate
2
. Anisotropic etching terminates automatically at epitaxial layer
3
; and the portion of epitaxial layer
3
at the removed portion of substrate
2
forms the diaphragm
18
.
Following removal of masks
15
and
16
, wafer
1
is bonded to a sheet of glass
17
(
FIG. 1
c
) using the anodic bonding method whereby a medium-high voltage (e.g. 500 V) is applied between wafer
1
and sheet
17
for a few hours at a temperature of 300 to 400° C.; and, finally, sheet
17
is fixed to container
19
.
The above method presents the following drawbacks: it is incompatible with batch processing techniques, due to the electric contacts on each wafer; rear etching of wafer
1
poses problems in terms of front-rear alignment; the thickness of wafer
1
demands prolonged etching; the scaling problems involved are such as to preclude the integration of structures smaller than a few hundred micrometers; and, once the diaphragm is formed, wafer
1
must invariably be bonded to a glass support, both for absolute and differential sensors (which require holes aligned with the diaphragm, thus posing further alignment problems).
On account of the above drawbacks, which make it difficult to integrate the method in currently used integrated circuit technology, several micro pressure sensor manufacturers have opted to form an integrated double chip: one chip contains the diaphragm microstructure, while the other provides for processing the signal. Single-chip integrated sensors also exist, but are not batch processed.
Several industrial laboratories and research centers have produced prototype integrated microstructures using the surface micromachining technique. Details of these are to be found, for example, in the following articles: “Novel Fully CMOS-Compatible Vacuum Sensor,” by O. Paul, H. Baltes, in
Sensors and Actuators A
46-47 (1995), pp. 143-146, in which a diaphragm of dielectric material is formed on a sacrificial metal layer; “Surface-Micromachined Piezoresistive Pressure Sensor,” by T. Lisec, H. Stauch, B. Wagner, in
Sensor
95
Kongressband
, A01.2, pp. 21-25, in which both the sacrificial polysilicon layer and a silicon nitride layer as the diaphragm.
Though they do in fact provide for better integration of the devices, the above surface micromachining techniques pose serious problems such as the quality of the films (amorphous or polycrystalline) deposited to form the diaphragms, collapse of the suspended structures on the silicon substrate, and packaging difficulties.
It is an object of the present invention to provide an integrated piezoresistive sensor and relative fabrication method, designed to overcome the aforementioned drawbacks.
SUMMARY OF THE INVENTION
According to the present invention, there is provided an integrated piezoresistive pressure sensor and a relative fabrication method. The integrated piezoresistive pressure sensor comprises a diaphragm formed in a body of semiconductor material and a number of piezoresistive ele

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