Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-07-24
2002-07-09
Ho, Hoai (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S108000
Reexamination Certificate
active
06417088
ABSTRACT:
BACKGROUND OF THE INVENTION
Copper (Cu) is gradually replacing aluminum (Al) as the interconnect material in integrated circuits. However, a problem arises due to the fact that the top layer Cu pad does not form a good connection with the normal bonding techniques. This is mainly due to the poor quality of copper oxide formed on the Cu pad surface upon exposure to the atmosphere and moisture.
In order to ensure a good contact between the chip and the bonding element, either the top Cu metal layer has to be replaced by Al, or an indirect way of bonding is needed. Both of these options increase the complexity and cost.
U.S. Pat. No. 5,462,892 to Gabriel describes a method of processing a semiconductor wafer so as to inhibit corrosion of aluminum or other metal interconnection lines. Such interconnection lines may be composed of tungsten (W)/titanium (Ti), aluminum (Al), aluminum-copper (Cu), or successive layers of W/Ti and Al—Cu. Once the interconnection lines are etched, the wafer is moved from an etching chamber a post-etching processing chamber, without exposure to the atmosphere, where a thin native oxide is formed on the exposed sidewalls of the just etched interconnection lines. The oxide layer protects the wafer surface from acidic corrosion upon subsequent exposure to the atmosphere.
U.S. Pat. No. 5,376,235 to Langley describes a process of using a wet chemical process to remove chlorine from dry etched metal features on a semiconductor wafer before an alloy step. The wet chemical process includes a 20:1phosphoric acid solution dip that prevents the formation of voids in the etched metal features during subsequent alloying steps up to about 425° C. by removing chlorine.
U.S. Pat. No. 5,384,284 to Doan et al. describes a process to form a pad interconnect whereby a metal layer or a metal alloy is bonded to an underlying aluminum pad by chemical vapor deposition (CVD) or by electroless deposition. A conductive epoxy film is then adhered to the metal layer. The metal layer may be comprised of, for example, Cu, Ni, W, Au, Ag, or Pt and the metal alloy may be comprised of titanium nitride, for example.
U.S. Pat. No. 5,719,087 to Chen et al. describes a method for forming a bonding pad on a semiconductor integrated circuit that includes forming a protective, dielectric cap on the surface of the bonding pad prior to deposition of the final passivation layer.
U.S. Pat. No. 5,891,756 to Erickson describes a method for forming a solder bump pad, and specifically to converting a wire bond pad of a surface-mount IC device to a flip-chip solder bump pad such that the IC device can be flip-chip mounted to a substrate. The method uses a Ni layer over the pad.
U.S. Pat. No. 5,733,466 to Benebo et al. describes a method of electrodepositing a gold metallurgy onto a feature of a printed circuit board. A copper layer is electrolessly deposited over the surface of a printed circuit board, patterned and etched, leaving the specific features to be plated. A layer of photoresist is applied atop the partially etched copper layer and is exposed and developed to uncover the features to be plated. These features are then plated with the metallurgy of choice, such as gold.
U.S. Pat. No. 5,647,942 to Haji describes a wire bonding method including the step of removing a thin surface layer of an electrode comprising a copper layer and a nickel layer formed on the surface of the copper layer and coated with gold on the surface. This removes nickel hydroxide and nickel oxide present on the gold film.
U.S. Pat. No. 5,785,236 to Cheung et al. describes a process for forming electrical connection between metal wires and metal interconnections not otherwise bondable, i.e. gold and aluminum wires and copper interconnects. The copper pads are modified, by forming an aluminum pad thereover, to permit the use of conventional wire bonding techniques.
U.S. Pat. No. 5,985,765 to Hsiao et al. describes a method for reducing bonding pad loss using a capping layer, preferably comprised of tungsten, when contact openings are etched to the bonding pads while much deeper fuse openings are concurrently etched.
U.S. Pat. No. 5,910,644 to Goodman et al. describes a printed circuit connector pad device having a tri-plated layer. The first, lower plated layer, is an initial diffusion resistant coating of nickel. The second, intermediate plated layer, is a hard, wear resistant noble or semi-noble metal such as pure palladium or a layer of gold hardened by cobalt, nickel, iron, or a combination of these dopants to effect a hardness of 200 to 250 (Knoop scale). The second layer provides pad on pad connector reliability and affords a metallurgically stable solder joints and wire-bond interfaces. the third, upper plated layer, is soft gold.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to form a conductive cap layer over a copper bonding pad for flip-chip, chip-on-board, and micro metal bonding.
It is another object of the present invention to provide a method of bonding a metal wire to a copper bonding pad.
A further object of the present invention is to provide a method of forming a conductive cap layer over a copper bonding pad to permit bonding a metal wire thereto.
Another object of the present invention is to provide a method of forming a low resistivity and inert metal cap layer on top of a copper bonding pad for direct metal bonding.
Yet another object of the present invention is to provide a method of selective formation of a low resistivity metal cap layer on top of a copper bonding pad to improve bonding adhesion to the copper bonding pad and to reduce process complexity of bonding on a copper bonding pad.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a semiconductor structure is provided having an exposed, recessed metal bonding pad within a layer opening. The layer has an upper surface. The exposed metal bonding pad is treated with a solution containing soluble metal ions to form a conductive cap over the metal bonding pad. The conductive cap layer is comprised of the solution metal and has a predetermined thickness. An external bonding element may then be bonded to the conductive cap, forming an electrical connection with the metal bonding pad.
REFERENCES:
patent: 5376235 (1994-12-01), Langley
patent: 5384284 (1995-01-01), Doan et al.
patent: 5462892 (1995-10-01), Gabriel
patent: 5567981 (1996-10-01), Bhansali et al.
patent: 5647942 (1997-07-01), Haji
patent: 5719087 (1998-02-01), Chen et al.
patent: 5733466 (1998-03-01), Benebo et al.
patent: 5785236 (1998-07-01), Cheung et al.
patent: 5891756 (1999-04-01), Erickson
patent: 5910644 (1999-06-01), Goodman et al.
patent: 5985765 (1999-11-01), Hsiao et al.
patent: 6043125 (2000-03-01), Williams et al.
Aliyu Yakub
Chooi Simon
Gupta Subhash
Ho Kwok Keung Paul
Roy Sudipto Ranendra
Chartered Semiconductor Manufacturing Ltd.
Ho Hoai
Le Dung A
Pike Rosemary L. S.
Stanton Stephen G.
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