Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Forming nonplanar surface
Reexamination Certificate
1999-10-07
2002-01-08
Baxter, Janet (Department: 1752)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Forming nonplanar surface
C430S394000, C430S313000
Reexamination Certificate
active
06337175
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming resist patterns suited for applications to wiring pattern formation with widths and intervals of a quarter micron (0.25&mgr;m) or smaller.
2. Description of the Background Art
In processes for manufacturing semiconductor integrated circuits (semiconductor devices), various treatments, such as etching and ion implantation, are selectively applied to semiconductor substrates (including not only unprocessed semiconductor substrates but also those already processed or treated in the semiconductor process sequence). In the processes, in order to selectively protect the semiconductor substrate as an underlying layer to be processed, a coating of compound sensitive to radiation such as ultraviolet rays, X-rays, electron beam, etc., i.e. a photosensitive resist (hereinafter referred to as resist), is formed on the substrate and then it is patterned by exposure using the radiation (which means exposure not only to visible light but also to various radiations such as ultraviolet rays, electron beam, etc.). That is to say, a resist pattern is formed on the semiconductor substrate through photolithography process.
In the most generally used method for forming resist patterns, exposure is carried out by using a reduction projection exposure system (stepper) using g-line (wavelength=436 nm) or i-line (wavelength=365 nm) of a mercury lamp, or a KrF excimer laser (wavelength=248 nm) as a light source. In such exposure, a photomask is attached to the stepper. The photomask is also called reticle, in which patterns to be transferred (e.g. wiring patterns) are drawn as mask patterns on a glass substrate with shielding film made of chromium (Cr), for example. In the exposure, the photomask and circuit patterns already formed on the semiconductor substrate are precisely positioned (aligned).
The mask pattern drawn on the photomask is projected by light emitted from the light source (not only visible light but also ultraviolet radiation etc. are referred to as ‘light’ in this specification), and the projected rays pass through a lens provided in the stepper. Thus the mask pattern is transferred onto the resist applied on the semiconductor substrate on a reduced scale. Subsequently, the resist is developed to form a resist pattern. The resist includes positive type and negative type. In positive resists, irradiated areas dissolve in a developer and unirradiated areas do not dissolve. In negative resists, irradiated areas do not dissolve in a developer and unirradiated areas dissolve.
In the semiconductor processes, the process of forming resist pattern is usually carried out twenty to thirty times. Recent progresses for higher integration and higher performance of semiconductor integrated circuits require further miniaturization of the circuit patterns. For example, in the case of DRAMs (Dynamic Random Access Memories), 0.25 to 0.20 &mgr;m resist patterns are drawn in the currently mass-produced 64-Mbits DRAMs. In the photolithography process, a KrF excimer laser light (wavelength=248 nm), which is an ultraviolet ray, is most often used as a light source. With the miniaturization of patterns, further improvements are required also in the dimensional accuracy and the overlay accuracy.
While, generally, shorter exposure wavelengths provide higher-resolution resist patterns, the resolution is coming near to its limit even through the use of the KrF excimer laser. For this, while some resolution enhancement techniques, such as the phase-shifting mask method and the off-axis method, are being suggested to improve the resolution, these methods have almost no effects on isolated patterns, although they are useful in constant pitch patterns.
FIGS. 25 and 26
are process diagrams showing an example of a conventional resist pattern formation method. In this example, first, a commercially available positive resist
52
is applied in a thickness of about 500 nm on a semiconductor substrate
51
. Subsequently, pre-baking is performed for 90 seconds at 100° C. The liquid positive resist
52
is thus hardened.
Next, a reticle (photomask)
61
having a pattern with various pitches (wiring pattern, for example) is attached to a stepper using a KrF excimer laser (wavelength=248 nm)
54
as a light source and exposure is performed. As a result, the pattern drawn on the reticle
61
is transferred on the positive resist
52
(see FIG.
25
).
Subsequently, a PEB (Post Exposure Baking) is performed at 110° C. for 90 seconds, which is followed by development for 60 seconds using a 2.38 weight percent solution of tetramethylammonium hydroxide (TMAH). As a result, a resist pattern
52
b
corresponding to the pattern drawn on the reticle
61
is obtained (see FIG.
26
).
FIGS. 27
to
29
are graphs showing measurements of characteristics of the conventional resist pattern formation method shown in
FIGS. 25 and 26
. For illumination conditions, NA (numerical aperture) was set as NA=0.55, and an off-axis method using 2/3ring zone illumination aperture was adopted.
FIG. 27
is a graph showing focus versus resist pattern size in 0.18-&mgr;m lines and spaces (a resist pattern with lines arranged at widths and intervals both equal to 0.18 &mgr;m).
FIG. 28
is a graph showing the focus versus the resist pattern size in a resist pattern with 0.18-&mgr;m linewidths and 5.0-&mgr;m intervals. A resist pattern in which the intervals are considerably larger than the linewidths is tentatively called isolated line. Here it is referred to as 0.18-&mgr;m isolated line.
In
FIGS. 27 and 28
, the resist pattern size means the width of linear resist pattern formed. The focus means the distance along the shallow focus direction (positive side) and the deep focus direction (negative side) on the basis of the focused position (focus=0). The plurality of curves correspond to different radiation energies, i.e. different radiation times, and the curve with black square marks corresponds to the radiation energy realizing the target resist pattern size (=0.18 &mgr;m). The energy sequentially becomes lower by 5% on the curves below the black square mark curve and the energy sequentially becomes higher by 5% on the curves above it.
Assuming that the energy error is tolerated to ±5% and the resist pattern size error is tolerated to ±0.03 &mgr;m, then, as shown in
FIG. 27
, a focus latitude of ±1 &mgr;m or larger is obtained with 0.18-&mgr;m lines and spaces. On the other hand, with the 0.18-&mgr;m isolated lines, as shown in
FIG. 28
, a focus latitude of only about ±0.3 &mgr;m can be obtained under the same tolerance conditions.
FIG. 29
shows the resist pattern size with respect to various intervals (spaces) in a resist pattern whose target linewidth is 0.18 &mgr;m. As shown in
FIG. 29
, errors of about 0.04 &mgr;m to 0.05 &mgr;m occur in the resist pattern size as the space varies. On the other hand, in the gate process requiring the highest dimensional accuracy in the semiconductor processes, i.e. in the process of patterning the gates of MOS transistors, accuracy within about 0.02 &mgr;m is required with respect to the design dimensions of the MOS transistors. Further, severer dimensional accuracy will be required as the miniaturization of patterns further advances in the future.
As described above, the conventional resist pattern formation method had the problem that ensuring the process latitude is not easy in semiconductor integrated circuits which will require higher dimensional accuracy in the future. Particularly, securing the focus latitude is especially difficult with isolated lines, and it is also difficult to control the dimensions (widths) varying depending on the intervals between adjacent parts of patterns.
SUMMARY OF THE INVENTION
A first aspect of the present invention is directed to a method for forming a resist pattern with a resist formed on a substrate and containing a polymer which is denatured by a first given component and a denaturin
Baxter Janet
Clarke Yvette M.
Mitsubishi Denki & Kabushiki Kaisha
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