Method for forming uniform oxide thickness

Details Method for forming uniform oxide thickness Method for forming uniform oxide thickness

2000-09-08

2002-07-23

Everhart, Caridad (Department: 2825)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S299000, C438S301000, C438S514000, C438S756000

Reexamination Certificate

active

06423600

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention pertains in general to a method for manufacturing a semiconductor device and, more particularly, to a method for forming a substantially uniform silicon oxide thickness.
2. Description of the Related Art
In a semiconductor manufacturing process, the uniformity of the thickness of a dielectric layer may affect ion implantation performance because ions are often implanted through a dielectric layer. An example is in the formation of source and drain regions of a transistor, such as a dynamic random access memory (DRAM) transistor.
Conventionally, a layer of silicon dioxide is formed over a silicon substrate. A polysilicon layer is deposited over the silicon dioxide layer, and a layer of metal silicide is deposited over the polysilicon layer. A cap nitride layer is then deposited over the metal silicide layer. After the polysilicon/metal silicide/cap nitride layer is patterned and etched to form a gate structure, a layer of silicon nitride is deposited over and around the sides of the gate structure. The silicon nitride layer is also deposited on portions of the silicon dioxide layer not covered by the gate structure. Anisotropic etch, such as plasma etch, is performed on the silicon nitride layer to remove the horizontal portion of the silicon nitride layer deposited over the silicon dioxide layer and the top of the gate structure. The remained portions of the silicon nitride layer are formed as “nitride spacers,” which act as masks during subsequent ion implantation to form the source and drain regions of the transistor. The nitride spacers prevent the gate structure from overlapping with either the drain region or source region.
During the anisotropic etch process, however, a portion of the silicon dioxide layer directly beneath the removed portions of the silicon nitride layer may be damaged by the plasma. A damaged silicon dioxide layer may exhibit non-uniform thickness. Because ions are implanted through the damaged silicon dioxide layer in order to form source and drain regions of the transistor, the non-uniformity thickness of the silicon dioxide layer may cause inconsistent implantation performance, such as inconsistent implant depths. Furthermore, having source and drain regions extend too far into the silicon substrate or having source and drain regions not extending far enough into the silicon substrate will result in the transistor not operating within specified electrical specifications. Furthermore, such inconsistency will generally adversely affect the yield of the manufacturing process.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method for forming a substantially uniform oxide thickness that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structures and methods particularly pointed out in the written description and claims hereof, as well as the appended drawings.
To achieve these and other advantages, and in accordance with the purpose of the invention as embodied and broadly described, there is provided a method for manufacturing a transistor device that includes forming an oxide layer over a substrate, forming a gate structure over the oxide layer, depositing a silicon nitride layer over the oxide layer and the gate structure, anisotropic etching the silicon nitride layer to remove portions of the silicon nitride layer, wherein remaining portions of the silicon nitride layer form nitride spacers contiguous with the gate structure, and a portion of the oxide layer beneath the removed portions of the silicon nitride layer is also removed, cleaning the oxide layer, applying a diluted hydrogen fluoride solution to the oxide layer to form a substantially uniform thickness of the oxide layer, and implanting ions through the oxide layer having a substantially uniform thickness to form source and drain regions of the transistor device.
In one aspect of the invention, the step of applying a diluted hydrogen fluoride includes applying a hydrogen fluoride solution having a diluted hydrogen fluoride concentration of approximately one part hydrogen fluoride to 500 parts water.
In another aspect of the invention, the step of applying a diluted hydrogen fluoride includes applying a hydrogen fluoride solution having a diluted hydrogen fluoride concentration of approximately one part hydrogen fluoride to 400 parts water.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5625217 (1997-04-01), Chau et al.
patent: 5744391 (1998-04-01), Chen
patent: 5851888 (1998-12-01), Gardner et al.
patent: 6074960 (2000-06-01), Lee et al.
patent: 6159806 (2000-12-01), Chern et al.

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