Method and a unit for programming a memory

Details Method and a unit for programming a memory Method and a unit for programming a memory

2008-07-01

2008-07-01

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07395472

ABSTRACT:
A unit and a method of programming mounted programmable memories by a programming boundary scan component/unit being directly coupled to the programmable memory and directly coupled to a boundary scan test system. Directly coupling the memory to the programming boundary scan component Thereby eliminates having to serially clock information to and from the programmable memory through a number of other boundary scan components/units. The drive routines for programming the programmable memory by means of a boundary scan test system only needs to be modified as to the length of the serial boundary scan cell chain.

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patent: 2006/0156099 (2006-07-01), Sweet et al.
patent: 91/07753 (1991-05-01), None

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