Serial data I/O on JTAG TCK with TMS clocking

Details Serial data I/O on JTAG TCK with TMS clocking Serial data I/O on JTAG TCK with TMS clocking

2008-07-22

2008-07-22

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S729000

Reexamination Certificate

active

07404128

ABSTRACT:
The present disclosure describes a novel method and apparatus of using the JTAG TAP's TMS and TCK terminals as a general purpose serial Input/Output (I/O) bus. According to the present disclosure, the TAP's TMS terminal is used as a clock signal and the TCK terminal is used as a bidirectional data signal to allow serial communication to occur between; (1) an IC and an external controller, (2) between a first and second IC, or (3) between a first and second core circuit within an IC.

REFERENCES:
patent: 6393081 (2002-05-01), Whetsel
patent: 6442092 (2002-08-01), Tomita

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