High availability multi-processor system

Details High availability multi-processor system High availability multi-processor system

2008-07-22

2008-07-22

Maskulinski, Michael C (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S010000

Reexamination Certificate

active

07404105

ABSTRACT:
A method and system are provided for enabling replacement of a failed processor without requiring redundancy of hardware. The system is a multiprocessing computer system that includes one or more processor chips. Each processor chip may include one or more logical processors. During system initialization, one or more logical processors may be reserved in an inactive state. In the event an error is detected on a logical or physical processor, one or more reserved logical processors may have execution context transferred from the processor experiencing the error. Thereafter, the active processor is designated as inactive and replaced by the inactive processor to which the execution context has been transferred.

REFERENCES:
patent: 5627962 (1997-05-01), Goodrum et al.
patent: 5903717 (1999-05-01), Wardrop
patent: 5923830 (1999-07-01), Fuchs et al.
patent: 6141770 (2000-10-01), Fuchs et al.
patent: 6189112 (2001-02-01), Slegel et al.
patent: 6308285 (2001-10-01), Bowers
patent: 2005/0172164 (2005-08-01), Fox et al.
patent: 0372578 (1990-06-01), None
patent: 8505707 (1986-05-01), None

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