Semiconductor device having an SOI structure and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S758000, C257SE27112

Reexamination Certificate

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07375397

ABSTRACT:
There is provided a semiconductor device in which the characteristic variations of a transistor and the degradation of a gate oxide layer are reduced during a WP process and a method for manufacturing the same. The semiconductor device includes a semiconductor chip having an SOI transistor. The SOI transistor includes a semiconductor layer comprising device isolating regions, a channel region, and diffusion regions that sandwich the channel region therebetween. The semiconductor layer is formed on a support substrate via a first insulating layer. A gate electrode is formed on the channel region of the semiconductor layer via a second insulating layer. The semiconductor chip has, on the first surface, a first electrode pad electrically connected to the SOI transistor and a second electrode pad electrically connected to the support substrate.

REFERENCES:
patent: 5696403 (1997-12-01), Rostoker et al.
patent: 2004/0207014 (2004-10-01), Kishiro
patent: 2004/0253798 (2004-12-01), Mori

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