SiGe nickel barrier structure employed in a CMOS device to...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S192000, C257S288000, C257S401000, C257SE21431

Reexamination Certificate

active

07397091

ABSTRACT:
A CMOS device such as an NFET or a PFET and a method of forming a CMOS device are provided. The method begins by forming at least one patterned gate region atop a first semiconductor layer that includes silicon. Dielectric spacers are formed about exposed portions of the patterned gate region. Source-drain regions are formed in the first semiconductor layer. Recesses are formed in the first semiconductor layer that extends under the dielectric spacers. The first semiconductor layer has exposed surfaces that in part define sidewalls of the recesses. A nickel barrier layer is formed on each of the exposed surfaces of the first semiconductor layer. The nickel barrier layers are etched so that the nickel barriers remain only on portions of the exposed surfaces located under the dielectric spacers and not on remaining portions of the exposed surface. A silicon-containing layer is formed on the remaining exposed surfaces of the first semiconductor layer. Silicide layers are formed on the silicon-containing layers, wherein the silicide layer includes nickel.

REFERENCES:
patent: 6214679 (2001-04-01), Murthy et al.
patent: 6399973 (2002-06-01), Roberds
patent: 6531347 (2003-03-01), Huster et al.
patent: 6833556 (2004-12-01), Grupp et al.
patent: 7176116 (2007-02-01), Cabral et al.
patent: 7274055 (2007-09-01), Murthy et al.
patent: 2001/0036693 (2001-11-01), Brigham et al.
patent: 2003/0003651 (2003-01-01), Divakaruni et al.
patent: 2003/0011080 (2003-01-01), Deshpande et al.
patent: 2003/0080283 (2003-05-01), Clark, Jr. et al.
patent: 2003/0141534 (2003-07-01), Coolbaugh et al.
patent: 2004/0014304 (2004-01-01), Bhattacharyya
patent: 2004/0071879 (2004-04-01), Callegari et al.
patent: 2004/0094804 (2004-05-01), Amos et al.
patent: 2004/0132236 (2004-07-01), Doris et al.
patent: 2004/0135212 (2004-07-01), Dokumaci et al.
patent: 2004/0266182 (2004-12-01), Ku et al.
patent: 2005/0093076 (2005-05-01), Steegen et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

SiGe nickel barrier structure employed in a CMOS device to... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with SiGe nickel barrier structure employed in a CMOS device to..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SiGe nickel barrier structure employed in a CMOS device to... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2791307

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.