Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2008-05-13
2008-05-13
Weiss, Howard (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S640000, C257SE21212, C438S791000
Reexamination Certificate
active
07372113
ABSTRACT:
Disclosed is a semiconductor device comprising a semiconductor substrate, a gate electrode, a first insulating film formed between the semiconductor substrate and the gate electrode, and a second insulating film formed along a top surface or a side surface of the gate electrode and including a lower silicon nitride film containing nitrogen, silicon and hydrogen and an upper silicon nitride film formed on the lower silicon nitride film and containing nitrogen, silicon and hydrogen, and wherein a composition ratio N/Si of nitrogen (N) to silicon (Si) in the lower silicon nitride film is higher than that in the upper silicon nitride film.
REFERENCES:
patent: 5041888 (1991-08-01), Possin et al.
patent: 5306946 (1994-04-01), Yamamoto
patent: 6023093 (2000-02-01), Gregor et al.
patent: 6103556 (2000-08-01), Nishimura et al.
patent: 6137156 (2000-10-01), Ichikawa et al.
patent: 6215148 (2001-04-01), Eitan
patent: 6417570 (2002-07-01), Ma et al.
patent: 6602771 (2003-08-01), Inoue et al.
patent: 6642099 (2003-11-01), Arimochi et al.
patent: 2002/0017169 (2002-02-01), Hu
patent: 2003/0122204 (2003-07-01), Nomoto et al.
patent: 2003/0151119 (2003-08-01), Sakama et al.
patent: 60-60770 (1985-04-01), None
patent: 2-59632 (1990-12-01), None
patent: 5-48631 (1993-07-01), None
patent: 6-125091 (1994-05-01), None
patent: 9-64205 (1997-03-01), None
patent: 11-046000 (1999-02-01), None
patent: 3382130 (1999-02-01), None
patent: 11-224908 (1999-08-01), None
patent: 2000-349283 (2000-12-01), None
patent: 2002-203917 (2002-07-01), None
patent: 2002-208646 (2002-07-01), None
Bu et al.; “Effects of Two-Step High Temperature Deuterium Anneals on SONOS Nonvolatile Memory Devices,” IEEE Electron Device Letters, vol. 22, No. 1, pp. 17-19, (2001).
Khare et al.; “Extending Scaling Limit of Tunnel Oxide by the Use of Nitride/Oxynitride in Flash Memory Devices”; Non-Volatile Semiconductor Memory Workshop, pp. 95-97, (1998).
Melik-Martirosian et al.; “An Experimental Flash Memory Cell With 55Å EOT Silicon Nitride Tunnel Dielectric”; Non-Volatile Semiconductor Memory Workshop, pp. 67-69, (2001).
Notification of the First Office Action issued by the Chinese Patent Office, dated Dec. 10, 2004, for Chinese Application No. 031381359, and English-language translation thereof.
1) Notification for Filing Opinion issued by the Korean Patent Office for Patent Application No. 10-2003-34051.
2) Notification for Filing Opinion issued by the Korean Patent Office for Patent Application No. 10-2005-0027960.
3) Notification for Filing Opinion issued by the Korean Patent Office for Patent Application No. 10-2005-0027963.
M. Tanaka et al., Realization of High Performance Dual Gate DRAMs without Boron Penetration by Application of Tetrachlorosilane Silicon Nitride Films, 2001 Symposium on VLSI Technology Digest of Technical Papers, pp. 123-124.
Goda Akira
Mitani Yuichiro
Noguchi Mitsuhiro
Ozawa Yoshio
Saida Shigehiko
Finnegan Henderson Farbow Garrett & Dunner, L.L.P.
Ingham John
Kabushiki Kaisha Toshiba
Weiss Howard
LandOfFree
Semiconductor device and method of manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method of manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2764779