TAP IR control with TAP/WSP or WSP DR control

Details TAP IR control with TAP/WSP or WSP DR control TAP IR control with TAP/WSP or WSP DR control

2008-07-22

2008-07-22

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S726000

Reexamination Certificate

active

07404129

ABSTRACT:
In a first embodiment a TAP of IEEE standard 1149.1 is allowed to commandeer control from a WSP of IEEE standard P1500 such that the P1500 architecture, normally controlled by the WSP, is rendered controllable by the TAP. In a second embodiment (1) the TAP and WSP based architectures are merged together such that the sharing of the previously described architectural elements are possible, and (2) the TAP and WSP test interfaces are merged into a single optimized test interface that is operable to perform all operations of each separate test interface. One approach provides for the TAP to maintain access and control of the TAP instruction register, but provides for a selected data register to be accessed and controlled by either the TAP+ATC or by the discrete CaptureDR, UpdateDR, TransferDR, ShiftDR, and ClockDR WSP data register control signals.

REFERENCES:
patent: 2005/0005217 (2005-01-01), Whetsel
patent: 2006/0248419 (2006-11-01), Colunga et al.
patent: 2007/0157058 (2007-07-01), Park et al.
IEEE Standard Test Access Port and Boundary-Scan Architecture IEEE Std 1149.1-2001.
Towards a Standard for Embedded Core Test: An Example by Marinissen et al. IEEE international Test Conference 1999 on pp. 616-627.
IEEE Standard Testability Method for Embedded Core-based Integrated Circuits IEEE Std 1500-2005.

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