Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-05-06
2008-05-06
Geyer, Scott B. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S157000, C438S228000, C257SE21014
Reexamination Certificate
active
07368354
ABSTRACT:
A planar substrate device integrated with fin field effect transistors (FinFETs) and a method of manufacture comprises a silicon-on-insulator (SOI) wafer comprising a substrate; a buried insulator layer over the substrate; and a semiconductor layer over the buried insulator layer. The structure further comprises a FinFET over the buried insulator layer and a field effect transistor (FET) integrated in the substrate, wherein the FET gate is planar to the FinFET gate. The structure further comprises retrograde well regions configured in the substrate. In one embodiment, the structure further comprises a shallow trench isolation region configured in the substrate.
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patent: 2005/0003592 (2005-01-01), Jones
Anderson Brent A.
Nowak Edward J.
Rankin Jed H.
Geyer Scott B.
Gibb & Rahman, LLC
International Business Machines - Corporation
Nikmanesh Seahvosh
Sabo, Esq. William D.
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