Semiconductor device and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S401000, C257S374000, C257S350000, C257S797000, C257SE21546, C257SE21564, C257SE21642

Reexamination Certificate

active

07910423

ABSTRACT:
A semiconductor device includes an SOI substrate, a first STI-type isolation region, a second STI-type isolation region, and an alignment mark region. The SOI substrate includes a support substrate, an insulating layer deposited on the support substrate, and a semiconductor layer which includes a thin film region and a thick film region. The thin film region includes a first semiconductor layer deposited on the support substrate, and the thick film region includes the first semiconductor layer and a second semiconductor layer deposited on a part of the first semiconductor layer. The first STI-type isolation region is disposed at the thin film region. The second STI-type isolation region is disposed at the thick film region. The alignment mark region is disposed at the thick film region. An alignment mark to be used for alignment of the second STI-type isolation region is disposed at the alignment mark region.

REFERENCES:
patent: 6252281 (2001-06-01), Yamamoto et al.
patent: 7067371 (2006-06-01), Ning et al.
patent: 2003/0094641 (2003-05-01), Gonzalez et al.
patent: 2006/0261410 (2006-11-01), Ohguro
patent: 2007/0077719 (2007-04-01), Koyama et al.
patent: 2003-68877 (2003-03-01), None
patent: 2005-19453 (2005-01-01), None

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