CMOS structure including differential channel stressing...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S044000, C438S093000, C438S197000, C438S222000, C438S285000, C438S413000, C438S416000, C438S429000, C438S442000, C257S049000, C257S338000, C257S350000, C257S351000, C257S371000, C257SE29021, C257SE29025, C257SE29027, C257SE29047

Reexamination Certificate

active

07875511

ABSTRACT:
A CMOS structure includes an n-FET device comprising an n-FET channel region and a p-FET device comprising a p-FET channel region. The n-FET channel region includes a first silicon material layer located upon a silicon-germanium alloy material layer. The p-FET channel includes a second silicon material layer located upon a silicon-germanium-carbon alloy material layer. The silicon-germanium alloy material layer induces a desirable tensile strain within the n-FET channel. The silicon-germanium-carbon alloy material layer suppresses an undesirable tensile strain within the p-FET channel region. A silicon-germanium-carbon alloy material from which is comprised the silicon-germanium-carbon alloy material layer may be formed by selectively incorporating carbon into a silicon-germanium alloy material from which is formed the silicon-germanium alloy material layer.

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Donaton et al., in “Design and Fabrication of MOSFETs with a Reverse Embedded SiGe (Rev. e-SiGe) Structure,” IEDM Technical Digest, 2006.

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