Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2011-07-26
2011-07-26
Arora, Ajay K (Department: 2892)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S704000, C257SE27137, C257SE27144, C438S108000
Reexamination Certificate
active
07986043
ABSTRACT:
An integrated circuit package on package system including forming an interconnect integrated circuit package and attaching an extended-lead integrated circuit package on the interconnect integrated circuit package wherein a mold cap of the extended-lead integrated circuit package faces a mold cap of the interconnect integrated circuit package.
REFERENCES:
patent: 5147815 (1992-09-01), Casto
patent: 5222014 (1993-06-01), Lin
patent: 5625228 (1997-04-01), Rogren
patent: 5685477 (1997-11-01), Mallik et al.
patent: 6168975 (2001-01-01), Zhang et al.
patent: 6190944 (2001-02-01), Choi
patent: 6229200 (2001-05-01), Mclellan et al.
patent: 6420779 (2002-07-01), Sharma et al.
patent: 6420799 (2002-07-01), Sakamoto et al.
patent: 6607937 (2003-08-01), Corisis
patent: 6815806 (2004-11-01), Awad et al.
patent: 6838751 (2005-01-01), Cheng et al.
patent: 6861288 (2005-03-01), Shim et al.
patent: 6906416 (2005-06-01), Karnezos
patent: 6917097 (2005-07-01), Chow et al.
patent: 6927096 (2005-08-01), Shimanuki
patent: 6933598 (2005-08-01), Karnezos
patent: 7045887 (2006-05-01), Karnezos
patent: 7049691 (2006-05-01), Karnezos
patent: 7053477 (2006-05-01), Karnezos et al.
patent: 7057269 (2006-06-01), Karnezos
patent: 7061088 (2006-06-01), Karnezos
patent: 7101731 (2006-09-01), Karnezos
patent: 7163842 (2007-01-01), Karnezos
patent: 7166494 (2007-01-01), Karnezos
patent: 7169642 (2007-01-01), Karnezos
patent: 7180166 (2007-02-01), Ho et al.
patent: 7235871 (2007-06-01), Corisis
patent: 7247519 (2007-07-01), Karnezos et al.
patent: 7247934 (2007-07-01), Pu
patent: 7253511 (2007-08-01), Karnezos et al.
patent: 7288434 (2007-10-01), Karnezos
patent: 7291926 (2007-11-01), Tao et al.
patent: 7351610 (2008-04-01), Karnezos
patent: 7358115 (2008-04-01), Karnezos
patent: 7364946 (2008-04-01), Karnezos
patent: 7372141 (2008-05-01), Karnezos et al.
patent: 7394148 (2008-07-01), Karnezos
patent: 7429786 (2008-09-01), Karnezos et al.
patent: 7429787 (2008-09-01), Karnezos et al.
patent: 2002/0041019 (2002-04-01), Gang
patent: 2002/0109216 (2002-08-01), Matsuzaki et al.
patent: 2002/0167074 (2002-11-01), Kim
patent: 2004/0114426 (2004-06-01), Fee et al.
patent: 2007/0209834 (2007-09-01), Kuan et al.
patent: 2007/0210424 (2007-09-01), Ho et al.
Daily, James W. Packaging of Electronic Systems—A Mechanical Engineering Approach. 1990. McGraw-Hill. ISBN 0-07-015214-4. pp. 97-98.
Chow Seng Guan
Dimaano Jr. Antonio B.
Ho Tsz Yin
Kuan Heap Hoe
Merilo Dioscoro A.
Arora Ajay K
Ishimaru Mikio
Stats Chippac Ltd.
LandOfFree
Integrated circuit package on package system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit package on package system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit package on package system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2689299