Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2011-01-11
2011-01-11
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S672000, C438S508000
Reexamination Certificate
active
07867895
ABSTRACT:
An interconnect structure including a gouging feature at the bottom of the via openings and a method of forming the same, which does not introduce either damages caused by Ar sputtering into the dielectric material that includes the via and line openings, nor plating voids into the structure are provided. The method includes the uses of at least one infusion process that forms an infused surface region within a conductive material of a lower interconnect level. The infused surface region has a different etch rate as compared with the conductive material and thus in a subsequent etching process, the infused surface region can be selectively removed forming a gouging feature within the structure.
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patent: 7276796 (2007-10-01), Yang et al.
patent: 7498254 (2009-03-01), Yang et al.
patent: 7528066 (2009-05-01), Yang et al.
patent: 7566975 (2009-07-01), Motoyama
patent: 2002/0019123 (2002-02-01), Ma et al.
Hon Wong Keith Kwong
Yang Chih-Chao
International Business Machines - Corporation
Le Dung A.
Li Wenjie
Scully , Scott, Murphy & Presser, P.C.
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