Semiconductor devices having faceted silicide contacts, and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21619, C257SE21634

Reexamination Certificate

active

07994014

ABSTRACT:
The disclosed subject matter relates to semiconductor transistor devices and associated fabrication techniques that can be utilized to form silicide contacts having an increased effective size, relative to conventional silicide contacts. A semiconductor device fabricated in accordance with the processes disclosed herein includes a layer of semiconductor material and a gate structure overlying the layer of semiconductor material. A channel region is formed in the layer of semiconductor material, the channel region underlying the gate structure. The semiconductor device also includes source and drain regions in the layer of semiconductor material, wherein the channel region is located between the source and drain regions. Moreover, the semiconductor device includes facet-shaped silicide contact areas overlying the source and drain regions.

REFERENCES:
patent: 7253086 (2007-08-01), Hall
patent: 2006/0115949 (2006-06-01), Zhang et al.
patent: 2006/0286729 (2006-12-01), Kavalieros et al.
patent: 2006/0289856 (2006-12-01), Shimamune et al.
patent: 2008/0001260 (2008-01-01), Zhu et al.
patent: 2008/0237634 (2008-10-01), Dyer et al.
patent: 1 677 360 (2006-07-01), None
PCT International Search Report for PCT/US2009/059560 mailed Aug. 23, 2010.

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