Method and apparatus for de-embedding on-wafer devices

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Testing or evaluating

Reexamination Certificate

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Reexamination Certificate

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07954080

ABSTRACT:
A method and system for de-embedding an on-wafer device is disclosed. The method comprises representing the intrinsic characteristics of a test structure using a set of ABCD matrix components; determining the intrinsic characteristics arising from the test structure; and using the determined intrinsic characteristics of the test structure to produce a set of parameters representative of the intrinsic characteristics of a device-under-test (“DUT”).

REFERENCES:
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patent: 2008/0265378 (2008-10-01), Lee et al.
Hsiao Tsung Yen et al., “A Physical L2L De-embedding Method for Silicon-based Devices Application”, TSMC R&D RF Spice Group, Taiwan, R.O.C., 4 pages.
Hsiao Tsung Yen et al., “A Physical L2L De-embedding Method for Silicon-based Devices Application”, TSMC R&D RF Spice Group, Taiwan, R.O.C., 4 pages.
Volker Blaschke et al., “Accurate Inductance De-embedding Technique for Scalable Inductor Models”, 2007 IEEE International Conference on Microelectronic Test Structures, Mar. 19-22, Tokyo, Japan, pp. 248-252.
Troels Emil Kolding et al., “Ground-Sheilded Measuring Technique for Accurate On-Wafer Characterization of RF CMOS Devices”, IEEE International Conference on Microelectronic Test Structures, Mar. 2000, Kolding, Jensen and Larsen, pp. 246-251.
Ming-Hsiang Cho et al., “A novel cascade-based de-embedding method for on-wafer microwave characterization and automatic measurement”, Microwave Symposium Digest, 2004 IEEE MTT-S International vol. 2, Issue , Jun. 6-11, 2004 pp. 1237-1240 vol. 2.
Jyh-Chyurn Guo et al., “A Broadband and Scalable Lumped Element Model for Fully Symmetric Inductors Under Single-Ended and Differentially Driven Operations”, Electron Devices, IEEE Transactions on vol. 54, Issue 8, Aug. 2007 pp. 1878-1888.

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