Semiconductor memory device and a method of manufacturing...

Details Semiconductor memory device and a method of manufacturing... Semiconductor memory device and a method of manufacturing...

2011-07-19

2011-07-19

Luu, Chuong A. (Department: 2892)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S197000, C438S153000, C438S238000

Reexamination Certificate

active

07981738

ABSTRACT:
A memory cell of an SRAM has two drive MISFETs and two vertical MISFETs. The p channel vertical MISFETs are formed above the n channel drive MISFETs. The vertical MISFETs respectively mainly include a laminate formed of a lower semiconductor layer, intermediate semiconductor layer and upper semiconductor layer laminated in this sequence, a gate insulating film of silicon oxide formed on the surface of the side wall of the laminate, and a gate electrode formed so as to cover the side wall of the laminate. The vertical MISFETs are perfect depletion type MISFETs.

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