Split gate non-volatile memory cell with improved endurance...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S260000, C257S319000, C257SE29300, C257SE29112, C257SE21422, C257SE21179

Reexamination Certificate

active

07923328

ABSTRACT:
A non-volatile memory cell including a substrate in which is formed a source region and a drain region defining a channel region between the source region and the drain region is provided. The non-volatile memory cell further includes a select gate structure overlying a first portion of the channel region. The non-volatile memory cell further includes a control gate structure formed overlying a second portion of the channel region, wherein the control gate structure includes a nanocrystal stack having a height, wherein the control gate structure has a convex shape in a corner region formed at an intersection of a first plane substantially parallel to a top surface of the substrate and a second plane substantially parallel to a side surface of the control gate structure, wherein a ratio of radius of the control gate structure in the corner region to the height of the nanocrystal stack is at least 0.5.

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Non-Published U.S. Appl. No. 11/671,809, filed Feb. 6, 2007, showing Brian A. Winstead as the first named inventor.
Non-Published U.S. Appl. No. 12/103,451, filed Apr. 15, 2008, showing Sung-Taeg Kang as the first named inventor.

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