Metal gate transistor and method for fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S183000, C438S188000, C438S272000, C438S926000

Reexamination Certificate

active

07888195

ABSTRACT:
A method for fabricating a transistor having metal gate is disclosed. First, a substrate is provided, in which the substrate includes a first transistor region and a second transistor region. A plurality of dummy gates is formed on the substrate, and a dielectric layer is deposited on the dummy gate. The dummy gates are removed to form a plurality of openings in the dielectric layer. A high-k dielectric layer is formed to cover the surface of the dielectric layer and the opening, and a cap layer is formed on the high-k dielectric layer thereafter. The cap layer disposed in the second transistor region is removed, and a metal layer is deposited on the cap layer of the first transistor region and the high-k dielectric layer of the second transistor region. A conductive layer is formed to fill the openings of the first transistor region and the second transistor region.

REFERENCES:
patent: 2004/0159903 (2004-08-01), Burgener et al.
patent: 2004/0173886 (2004-09-01), Carley
patent: 2005/0263829 (2005-12-01), Song et al.
patent: 2006/0065939 (2006-03-01), Doczy et al.
patent: 2006/0134433 (2006-06-01), Maula et al.
patent: 2009/0017563 (2009-01-01), Jiang et al.

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