Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-05-04
2001-10-30
Powell, William A. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S724000, C438S740000, C438S743000, C438S744000
Reexamination Certificate
active
06309980
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the art of semiconductor integrated circuit arrangement fabrication, and particularly to an art for dry-etching a thin film on a semiconductor wafer by using radicals or ions in a plasma.
A silicon oxide film, which is a typical insulating film used to fabricate an LSI, is normally processed by a dry-etching system (plasma etching system) using a plasma process.
In the case of an etching process using a typical magneto-microwave plasma etching system, a vacuum chamber of the etching system comprising a reaction chamber (etching chamber) and a discharge chamber is first evacuated up to approx. 10
−6
Torr by an evacuating system and then a reaction gas is introduced into the vacuum chamber through a needle valve to a predetermined pressure (approx. 10
−5
to 10
−1
Torr).
The etching of a silicon oxide film deposited on a silicon wafer uses, for example, a fluorocarbon gas such as CF
4
, C
2
F
6
, C
3
F
8
, or C
4
F
8
and a hydrogen-containing fluorocarbon gas such as CHF
3
or CH
2
F
2
, or a mixed gas of a fluorocarbon-based gas and hydrogen. Hereafter, these gases are generally referred to as flon gases.
Microwaves of 1 to 10 GHz (ordinarily of 2.45 GHz) generated by a microwave generator (ordinarily a magnetron) are propagated through a wave guide and are introduced into a discharge tube forming a discharge chamber. The discharge tube is made of an insulating material (ordinarily quartz or alumina) in order to pass microwaves.
A magnetic field is locally formed in the discharge and reaction chambers by an electromagnet and a permanent magnet. When a microwave electric field is introduced into the discharge chamber under the above state, magnetic-field microwave discharge occurs due to a synergistic action between the magnetic field and the microwave electric field, and a plasma is formed.
In this case, the reaction gas dissociates in the plasma and thereby various radicals and ions are generated. Dissociation of the reaction gas is caused because electrons in reaction gas molecules collide with those in the plasma or absorb light, and thereby become excited to antibonding orbitals These dissociated species are supplied to the surface of a silicon oxide film to participate in the etching of the silicon oxide film whine dissociation species influence the dry-etching characteristics in a complex way.
A dry etching system using this type of plasma process is disclosed in Japanese Patent Laid-Open No. 109728/1991.
SUMMARY OF THE INVENTION
An electronic device such as a silicon LSI or a TFT (thin-film transistor) has a structure in which a silicon oxide film of an object material to be dry-etched is deposited on a silicon film (e.g. silicon substrate, silicon epitaxial film, or polysilicon film), silicon nitride film, or a multilayer film made of these films.
In the case of an electronic device with a high integration level, it is possible to open a contact hole with a diameter of 0.5 &mgr;m or less and a high aspect ratio (hole depth/hole diameter), and moreover etching with a high accuracy and a high selection ratio is necessary, while minimizing the etching amount of a base silicon film, silicon nitride film, or a multilayer film made of these films.
To realize such an etching, it is necessary to accurately control the composition of dissociated species of a reaction gas. However, it is difficult to realize this control by a conventional etching method using dissociation of reaction gas molecules caused by collision of electrons in a plasma.
This is because selective excitation by electrons can be realized only on antibonding orbitals of the minimum energy, but electrons with uniform energy necessary for realizing it cannot be obtained in a plasma. Therefore, it is necessary to produce electrons with uniform energy outside and introduce them into the plasma or introduce a light source with a uniform energy into the plasma. In this case, however, the cost of an etching system greatly increases.
It is an object of the present invention to provide a technique of realizing etching with a high selection ratio and a high accuracy.
The above and other objects and novel features of the present invention will become apparent from the description of this specification and accompanying drawings.
The outline of representatives of the inventions disclosed in this application will be briefly described below.
(1) In a semiconductor integrated circuit arrangement fabrication method of the present invention, desired dissociated species are produced by allowing an inert gas excited to a metastable state in a plasma and a reaction gas necessary for dry-etching a thin film on a semiconductor substrate to interact with each other when dry-etching the thin film.
(2) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (1), the dissociation of the reaction gas caused by collision with electrons is reduced by separating a plasma generation chamber of a plasma dry-etching system from a reaction chamber thereof, and preventing electrons in the plasma from entering the reaction chamber.
(3) In a semiconductor integrated circuit arrangement fabrication method of the present invention, desired dissociated species are selectively produced by allowing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other when dry-etching a silicon oxide film on a semiconductor substrate.
(4) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3), the flon gas is a chain perfluorocarbon with two or more carbon atoms.
(5) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3), the flon gas is a chain perfluorocarbon with two to six carbon atoms.
(6) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3), the flon gas is a cyclic perfluorocarbon with three or more carbon atoms.
(7) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3) the inert gas is one or more rare gases selected out of the group of He, Ne, Ar, Kr, and Xe.
(8) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3), dissociated species with a high selection ratio to silicon nitride are produced.
(9) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3), the proportion of the inert gas to the total gas flow rate is 50% or more and the processing pressure is 100 mTorr to 1 Torr.
(10) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3), the proportion of the inert gas to the total gas flow rate is 80% or more and the processing pressure is 100 to 500 mTorr.
(11) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3), an inorganic material is used as a mask for dry etching
(12) In a semiconductor integrated circuit arrangement fabrication method of the present invention, desired dissociated species are selectively produced by allowing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other when a silicon nitride film on a semiconductor substrate is dry-etched.
(13) In the semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (12), dissociated species with a high selection ratio to silicon are produced by using one or more rare gases selected out of the group of He, Ar, Kr, and Xe as the inert gas and difluoromethane as the flon gas.
(14) In a semiconductor integrated circuit arrangement fabrication method of the present invention according to the method (3), the proportion of the inert gas of the total gas flow rate is 80% or more and the process
Kazumi Hideyuki
Mizutani Tatsumi
Okudaira Sadayuki
Tago Kazutami
Tokunaga Takafumi
Hitachi , Ltd.
Mattingly Stanger & Malur, P.C.
Powell William A.
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