Method of manufacturing semiconductor device

Details Method of manufacturing semiconductor device Method of manufacturing semiconductor device

1998-11-06

2001-02-13

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S396000, C438S666000, C438S740000, C438S255000, C438S398000

Reexamination Certificate

active

06187623

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device having a cylindrical capacitor.
To increase the memory capacity, a memory device having a cylindrical capacitor has conventionally been proposed in, e.g., Japanese Patent Laid-Open No. 5-218333. In this memory device, the lower electrode of the capacitor is formed into a cylindrical shape to increase the contact area between the upper and lower electrodes via a dielectric film without increasing the occupied area of the capacitor and to increase the integration degree while ensuring the capacitance of the capacitor. This cylindrical lower electrode is generally called a storage electrode.
FIGS. 4A
to
4
E show a method of manufacturing a conventional cylindrical capacitor.
The step in
FIG. 4A
according to a general manufacturing method will be described briefly. A gate oxide film
2
, a gate electrode
3
, a diffusion layer
4
, and the like are selectively formed on a silicon substrate
1
to constitute an element.
FIGS. 4A
to
4
E show only one element on the substrate
1
, but a plurality of elements are practically manufactured. The elements are electrically isolated from each other by element isolation films
5
.
An interlevel insulating film
6
and an oxide film
7
are sequentially formed on these elements and the element isolation films
5
. Each contact hole
14
is formed in the diffusion layer
4
through the two films. An oxide film
8
is formed on the side surface in the contact hole
14
to improve electrical characteristics.
Simultaneously when the contact hole
14
is filled, a polysilicon film
9
having a predetermined thickness is formed on the oxide film
7
. An oxide film
30
having a predetermined width and a polysilicon film
13
are stacked on the silicon film
9
. Silicon oxide sidewalls
15
a
are formed on the sidewalls of the oxide film
30
and silicon film
13
.
As shown in
FIG. 4B
, while the silicon film
9
is etched using the oxide film
7
as an etching stopper, the silicon film
13
is etched using the oxide film
30
as an etching stopper.
As shown in
FIG. 4C
, the oxide film
30
is etched away to expose the silicon film
9
.
As shown in
FIG. 4D
, the silicon film
9
is etched to a predetermined thickness on the bottom using the sidewall
15
a
as an etching mask. Then, a recessed storage electrode
16
whose top is open is formed from the silicon film
9
.
As shown in
FIG. 4E
, a dielectric layer
18
is formed on the surface of the storage electrode
16
, and a cell plate electrode
19
is formed on the dielectric layer
18
to complete the cylindrical capacitor.
In this prior art, the thickness of the silicon film on the bottom of the storage electrode
16
cannot be stably controlled because the endpoint cannot be detected in etching the silicon film
9
in the step of FIG.
4
D. If the silicon film on the bottom is too thin, the resistance increases to generate a memory hold error; if the silicon film is too thick, the inner area of the storage electrode
16
decreases to decrease the capacitance of the capacitor.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device manufacturing method capable of easily controlling the etching depth.
To achieve the above object, according to the present invention, there is provided a method of manufacturing a semiconductor device in which a capacitor having a storage electrode is formed on a semiconductor substrate, comprising the steps of forming silicon films on the semiconductor substrate and at the same time forming when first and second endpoint marker layers for dividing the silicon films into three parts in a direction of thickness by using a material different from a material of the silicon films, etching the silicon films including the first and second endpoint marker layers, and controlling an etching depth of the silicon films based on the type of etched material, thereby forming the storage electrode.


REFERENCES:
patent: 5043292 (1991-08-01), Aronowitz et al.
patent: 5380673 (1995-01-01), Yang et al.
patent: 5413950 (1995-05-01), Chen et al.
patent: 5837580 (1998-11-01), Thakur et al.
patent: 5946566 (1999-08-01), Choi
patent: 2312989 (1997-11-01), None
patent: 5-218333 (1993-08-01), None
patent: 8-37240 (1996-02-01), None
Wolf, Stanley. Silicon Processing for the VLSI Era, vol. 1 Process Technology. Lattice Press. Sunset Beach, California. p. 567, Jun. 1990.

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