Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-12-02
2000-05-16
Fourson, George
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438286, 257296, H10L 218234
Patent
active
060636718
ABSTRACT:
A method of forming a high-voltage device is provided. A substrate with a first electrical type is provided. A first doped region with a second electrical type is formed in a portion of the substrate. A first field oxide layer and a second field oxide layer are formed on the first doped region and on the substrate near the first doped region. A second doped region with the second electrical type is formed in the substrate between the first field oxide layer and the second field oxide layer. Doping concentration of the second doped region is higher than of the first doped region. A third doped region with the first electrical type is formed in the substrate near the second field oxide layer. Doping concentration of the third doped region and doping concentration of the first doped region are the same. A source region is formed within the top portion of the first doped region near the first field oxide layer. A drain region is formed within the top portion of the third doped region near the second field oxide layer. A fourth doped region is formed within the top portion of the third doped region near the source region. Doping concentration of the fourth doped region is higher than of the third doped region. The second field oxide layer is removed. A gate oxide layer is formed at the position of the second field oxide layer. Openings are formed to expose a part of the source/drain region and a part of the fourth doped region. Conductor fills the openings to form a gate electrode, a source electrode and a drain electrode.
Fourson George
Pham Long
United Microelectronics Corp.
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