Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-08-04
2001-08-21
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S688000, C438S692000, C438S693000
Reexamination Certificate
active
06277746
ABSTRACT:
TECHNICAL FIELD
The invention pertains to semiconductor processing methods of reducing corrosion of materials. The invention has particular application to methods of forming aluminum-comprising lines, and to aluminum-comprising lines.
BACKGROUND OF THE INVENTION
Corrodible materials are frequently utilized in integrated circuitry formed on semiconductive wafers. In the context of this disclosure, the term “corrodible material” refers to a material that can undergo electrochemical degradation during semiconductor fabrication processes. An example corrodible material is an aluminum-comprising material. Aluminum-comprising materials can, for example, consist essentially of elemental aluminum, or can comprise an alloy, such as aluminum/copper. Aluminum-comprising materials are utilized in semiconductor applications as, for example, circuit components or conductive interconnects for electrically connecting circuit components.
A method of forming aluminum-comprising conductive interconnects is a damascene method. In a damascene method, a pattern of trenches is formed within an insulative material. An aluminum-comprising layer is then formed over the insulating material and within the trenches. The aluminum-comprising material is subsequently planarized to remove portions of the material that are not within trenches.
The planarization typically comprises chemical-mechanical polishing utilizing a polishing pad to rub an abrasive slurry against the aluminum-comprising layer. Typically, the slurry comprises an aluminum oxide grit within an aqueous carrier solution. The slurry can have a pH of, for example, from about 2.5 to about 4.0. Example slurries are EP-A5655 (sold by Cabot), and XVS-6902 (sold by Rodel). In alternative processes, a polishing pad is rubbed directly on an aluminum-comprising layer to abrade the layer. In such alternative processes, a liquid is typically provided over the aluminum-comprising layer during the abrading, but the liquid may not comprise a slurry. A prior art slurry polishing process is described with reference to FIG.
1
.
In step “A” of the
FIG. 1
process a surface of a wafer is polished with a slurry. In the example process described herein, the polishing is utilized to abrade an aluminum-comprising material. Polishing of an aluminum-comprising material can, for example, be incorporated into a damascene process.
After polishing of the aluminum-comprising layer, the slurry is displaced with deionized (DI) water (step “B” of the
FIG. 1
process). The DI water is flushed between the polishing pad and the layer, with the polishing pad typically continuing to spin relative to the surface during such flushing. However, the DI water does not comprise a grit, so abrasion of the aluminum-comprising layer is substantially reduced as the DI water displaces the slurry. The DI water can comprise a small amount (10 to 20 ppm, or less than 0.01% (by atomic percent)) of ozone due to atmospheric ozone diffusing into the water. The DI water can also comprise a small amount (less than 0.1%) of carbon dioxide and/or carbonic acid due to diffusion of atmospheric carbon dioxide into the water.
After the slurry is displaced, the polishing pad is separated from the wafer, and the wafer is transferred to an unload bath (step “C” of the
FIG. 1
process). The unload bath contains deionized water, and keeps a surface of the wafer wet as remaining wafers in a cassette are polished. Typically, a cassette will contain at least twenty-five wafers, and the wafers are polished one or two at a time. Polished wafers are kept wet as other wafers in a cassette are polished because otherwise grit remaining on the wafers from the polishing process can dry and become difficult to remove. The DI water in the unload bath has a pH of at least 7. As the wafers are transferred to the unload bath, they are preferably sprayed with water to alleviate drying of slurry granules on the wafers during the transfer.
After the wafers of a cassette are transferred to an unload bath, the wafers are transferred to a scrubber to further clean polishing grit from the wafer surfaces (step “D” of the
FIG. 1
process). The scrubber comprises a load station were the wafers are kept prior to being scrubbed. The wafers are preferably sprayed with DI water as they are kept in the load station to alleviate grit drying on the wafers. The wafers are then scrubbed to remove residual grit on the wafer surfaces. The scrubbing can comprise mechanically brushing grit from a wafer surface while immersing the wafer surface in a liquid. The liquid can comprise, for example, water buffered with citric acid and tetramethylammonium hydroxide (TMAH) to maintain a pH of liquid within the scrubber to below 7. Such low pH liquid can assist in removing grit particles from the wafer.
After the grit on the wafer is removed with the scrubber, the wafer is transferred to a location where it is spun dry (step “E” of the
FIG. 1
process).
A difficulty which can occur during the processing sequence described with reference to
FIG. 1
is corrosion of a polished aluminum-comprising material. The corrosion can result in a loss of some or all of the aluminum-comprising material that is intended to remain on the wafer after the polishing process. If a relatively small amount of the material is lost, pits can occur within the aluminum-comprising material. If a larger amount of the material is lost, large crevices can be formed within the material.
Corrosion of an aluminum-comprising material can adversely affect physical properties of conductive lines formed from the aluminum-comprising material. For instance, conductance and strength of the aluminum-comprising material can be adversely affected. Also, pitting or crevice formation can decrease a surface planarity of a polished aluminum-comprising layer. As high surface planarity is frequently desirable for subsequent process steps, a decrease in surface planarity can adversely affect downstream fabrication processes utilizing the corroded aluminum-comprising layer. It would be desirable to develop alternative methods of processing aluminum-comprising layers wherein the above-described corrosion is avoided or at least reduced. More generally, it would be desirable to develop semiconductor processing methods which alleviate corrosion of processed materials.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a semiconductor processing method of reducing corrosion of a material. The material is exposed to a liquid solution comprising at least about 5% (by atomic percent) of an oxygen-comprising oxidant to form an oxide layer over is the material.
In another aspect, the invention encompasses a semiconductor processing method of reducing a thickness of an aluminum-comprising layer. A portion of an aluminum-comprising layer is abraded with a first fluid comprising a slurry having a polishing grit. The first fluid is displaced with a second fluid comprising at least about 5% (by atomic percent) of an oxygen-comprising oxidant.
In yet another aspect, the invention encompasses a semiconductor processing method of forming an aluminum-comprising line within a layer of material. A layer of material is formed over a semiconductive substrate. Trenches are formed within the layer of material. An aluminum-comprising layer is formed within the trenches and over the layer of material. The aluminum-comprising layer is planarized to form aluminum-comprising lines within the material. The planarizing comprises abrading a portion of the aluminum-comprising layer with a first fluid comprising a slurry. The slurry is displaced with a second fluid comprising at least about 5% (by atomic percent) of ozone.
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patent: 5453401 (1995-09-01), Grivna et al.
patent: 5783489 (1998-07-01), Kaufman et al.
patent: 5820746 (1998-10-01), Kawaguchi et al.
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Kaanta, Carter W., et al., “Dual Damascene: A ULSI Wiring Technology,” Jun. 11-21, 1991, pp. 144-152, TH-0359-0/91/0000-01
McTeer Allen
Skrovan John
Gayka Alexander G.
Micro)n Technology, Inc.
Niebling John F.
Wells, St. John, Roberts Gregory & Matkin P.S.
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