Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-08-06
2001-05-22
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S305000
Reexamination Certificate
active
06235597
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a semiconductor structure having metallic silicide in source/drain regions and especially source/drain regions between closely spaced gate structures. In particular, the present invention includes forming an L-shaped spacer between adjacent gate structures. The L-shaped spacer is used to form shallow source/drain regions adjacent to the gates, independent of the lightly doped drain regions (LDDs). The L-shaped spacer is subsequently modified to increase the available area for silicide formation without the silicide directly contacting the lightly doped drain regions.
BACKGROUND OF INVENTION
In fabricating semiconductor structures, the source/drain resistance is reduced by forming a layer of a refractory metal silicide. In particular, a refractory metal is deposited and then subjected to elevated temperatures, thereby reacting with underlying silicon to form what is commonly referred to as a “silicide”. Silicides are well known in the art and provide dependable silicon contacts as well as low ohmic resistance.
Silicides are commonly used to reduce the source/drain resistance between adjacent gate structures. However, as device dimensions shrink, so does the spacing between adjacent gate structures. The available space for silicide formation shrinks faster than the ground rules for gate-to-gate spacing due to the finite width of the gate spacers. The shrinking lateral dimensions increase the resistance of any device that uses the source/drain as a conduction path. The formation of silicide in narrow spaces between gates may also be more difficult, leading to an elevated and variable resistance in these regions.
SUMMARY OF INVENTION
The present invention provides for increasing the space available for silicide formation between closely spaced gate structures thereby lowering the diffusion resistance. In particular, the present invention provides for an effectively narrower spacer between gate structures during silicide formation without degrading the device short channel behavior. More particularly, the present invention provides for a partially disposable spacer process for improving silicide formation between gate structures. According to the present invention, an L-shaped spacer is formed which is used to form shallow source/drain regions, independent of the lightly doped drain regions and the deep source/drain regions where the device contacts are placed, and to form the silicide without direct contact to the lightly doped drain regions.
More particularly, the present invention relates to a semiconductor structure comprising a semiconductor substrate having a plurality of gates located thereon and being separated from the semiconductor substrate by a first insulating layer. A sidewall of at least one gate of a plurality of gates is separated from an adjacent sidewall of an adjacent gate by a distance of about 0.5 &mgr;m or less; and the sidewalls of the gates include an insulating spacer containing one or more dielectric layers. Metallic silicide is located between adjacent gates on the semiconductor substrate. Source/drain doping is located beneath the metallic silicide. A doped junction is present between the source/drain doping and the gate channel region and extends beneath the insulating spacer.
Another aspect of the present invention relates to a method for fabricating a semiconductor structure. The method comprises providing a semiconductor substrate and providing a plurality of gates located on the semiconductor substrate and being separated from the semiconductor substrate by a first insulating layer. Optionally, first dopants (LDDS) are implanted into the substrate in the spacing between adjacent gates. Insulating spacers are provided on sidewalls of the gates. The insulating spacers are L-shaped having a vertical portion and a horizontal portion. Spacing exists between adjacent L-shaped insulating spacers. Source/drain dopants are implanted between adjacent L-shaped insulating spacers and beneath the horizontal portion of the L-shaped insulating spacer. The horizontal portion of the L-shaped spacer partially blocks the source/drain dopants, thereby reducing their depth. The horizontal portion of the L-shaped insulating spacers is subsequently removed by etching, followed by forming a metallic silicide in the spacing between adjacent gates. The removal of horizontal portions of the L-spacers increases the area of silicide formation thereby lowering the diffusion resistance.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.
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Connolly Bove Lodge & Hutz
International Business Machines - Corporation
Lindsay Jr. Walter L.
Niebling John F.
Sabo William D.
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