Methods for controlling an RF matching network

Wave transmission lines and networks – Automatically controlled systems – Impedance matching

Reexamination Certificate

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Details

C333S032000, C333S0990PL, C315S111210

Reexamination Certificate

active

06259334

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the manufacture of semiconductor devices. More specifically, the present invention relates to improved methods and apparatus for tuning rf matching networks for a plasma processing chamber.
2. Description of the Related Art
Semiconductor processing systems are generally used to process semiconductor wafers for fabrication of integrated circuits. For example, plasmaenhanced semiconductor processes are commonly used in etching, oxidation, chemical vapor deposition, or the like. The plasma-enhanced semiconductor processes are typically carried out by means of plasma processing systems.
FIG. 1
illustrates a representative plasma processing system
100
for processing a semiconductor wafer
102
. The plasma processing system
100
includes a plasma processing chamber
104
, which is well known in the art. The processing chamber
104
includes an electrostatic chuck
112
for supporting and clamping the wafer
102
in place for plasma processing. The plasma processing system
100
also includes an rf generator
106
and an rf matching network
110
coupled to the rf generator
106
by means of a cable
108
. The rf matching network
110
is coupled to deliver rf power from the rf generator
106
to the electrostatic chuck
112
.
When the rf generator
106
is energized after a source gas (not shown) has been introduced into the chamber
104
, a plasma
114
is created from the source gas. The wafer
102
is disposed over the electrostatic chuck
112
to be processed by the plasma. A heat transfer gas (e.g., helium)
116
may be provided to the wafer
102
under pressure via one or more ports
118
through the electrostatic chuck
112
. The heat transfer gas
116
acts as a heat transfer medium between the wafer
102
and electrostatic chuck
112
to facilitate control of the wafer temperature during processing.
In this arrangement however, the rf power supplied to the plasma processing chamber
104
may be reflected back from the plasma processing chamber
104
, thereby reducing the efficiency of the plasma processing system
100
. The rf power reflection is generally caused by a mismatch in impedance of the rf generator
106
and a load formed by the plasma
114
and the chuck
112
. The rf generator
106
has an output impedance Z
0
, which is typically 50&OHgr;. The cable
108
has a matching characteristic impedance equal to the output impedance of the rf generator
106
. The plasma
114
and the chuck
112
together form the load characterized by a complex load impedance Z
L
. If Z
L
is not equal to Z
0
*, which is the complex conjugate of Z
0
, then an impedance mismatch exists between the generator and the load.
The rf matching network
1
10
is provided between the rf generator
106
and the plasma processing chamber
104
to minimize reflection of rf power from the plasma processing chamber
104
. The rf matching network
110
typically includes two or more variable impedance elements (e.g., capacitors, inductors). The variable impedance elements may be tuned to provide an impedance Z
M
that matches the impedance of the rf generator
106
.
FIG. 2
shows a circuit diagram of an exemplary rf matching network
110
coupled to the load
202
, which is equivalent to the combination of the electrostatic chuck
112
and plasma
114
. The rf matching network
110
includes a variable capacitor C
1
coupled to an inductor L
1
in series. The rf matching network
110
also includes a variable capacitor C
2
coupled in series to an inductor L
2
. The variable capacitors C
1
and C
2
are coupled to each other at a junction A. The electrode and plasma load
202
is coupled in series with the inductor L
2
and is coupled to a junction B.
In this configuration, the variable capacitors C
1
and C
2
may be tuned to provide an impedance Z
M
across the junctions A and B, which matches the impedance of the rf generator
106
. The impedance, Z
M
, represents the total impedance of the network
110
in combination with the load
202
. Ideally, when the impedance Z
M
is equal to the output impedance of the rf generator
106
, the rf power reflected is at zero percent.
For example, if the impedance of the rf generator
106
is 50&OHgr;, then the magnitude and phase of complex impedance Z
M
need to be equal to 50&OHgr; and zero degrees, respectively, in order to minimize power reflection. The set of values of the capacitors C
1
and C
2
at which the complex impedance Z
M
equals the output impedance of the rf generator
106
is referred to as a “tune” point or target point. Accordingly, the tune or target point is where the power reflection is at a minimum.
Several techniques are known for tuning variable impedance elements in an rf matching network.
FIG. 3
illustrates a flow chart of a conventional method for tuning capacitors C
1
and C
2
. The method starts in operation
302
and proceeds to operation
304
, where the plasma processing system
100
including the rf generator
106
is activated. At this time, the capacitors C
1
and C
2
are usually not set properly to the tune point. Thus, some rf power is reflected back.
Then in operation
306
, the magnitude and phase of Z
M
are determined by measuring a voltage V, a current I, and an angle &thgr; between the voltage and current in accordance with well known equation Z
M
=|Z
M
|e
i&thgr;
, with |Z
M
|=|V|/|I|. In operation
308
, it is determined whether the magnitude of Z
M
is equal to a tune point value, for example, of 50&OHgr;. If not, the operation proceeds to operation
310
, where the variable capacitor C
2
is adjusted by means of a computer and DC motors to match the impedance of the rf generator
106
. If the magnitude of impedance Z
M
is greater than the impedance of the rf generator
106
, then the capacitance of C
2
is increased. Conversely, if the magnitude of impedance of Z
M
is less than the impedance of the rf generator
106
, then the capacitance of C
2
is decreased.
After adjusting capacitor C
2
in operation
310
or if magnitude is equal to the tune point in operation
308
, the method proceeds to operation
312
, where it is determined if the phase is equal to zero degrees. If the phase is determined to be non-zero, the method proceeds to operation
314
, where capacitor C
1
is adjusted to change the phase to reach the target impedance phase of zero degrees. For example, if the phase of the impedance Z
M
is less than zero, then the capacitance of C
1
is increased. Conversely, if the phase is greater than zero, the capacitance of C
1
is decreased. It should be noted that the variable capacitors C
1
and C
2
are adjusted by means of a computer and DC motors. Specifically, a computer may drive the DC motors to adjust the capacitance of the capacitors C
1
and C
2
so as to reach the target tune point.
After adjusting capacitor C
1
in operation
314
or if the phase is equal to zero in operation
312
, the method proceeds to operation
316
, where it is determined whether the plasma processing is complete. If so, the method terminates operation
318
. Otherwise, the method proceeds back to operation
306
to continue tuning the capacitors C
1
and C
2
in the continually varying conditions (e.g., varying load, drifting tuning motors) of the plasma processing system.
Unfortunately, the method described in
FIG. 3
may not efficiently tune the capacitors to the target point for certain ranges of capacitance values. The problem is illustrated more clearly in
FIGS. 4A and 4B
.
FIG. 4A
illustrates an exemplary graph
400
plotting the magnitude
402
of impedance Z
M
and reflected power
404
as a function of the value of capacitor C
2
for capacitor C
1
held fixed at its tune value. The tune value of capacitor C
2
is about 231 pF.
A line
406
indicates the impedance tune value of 50&OHgr;. The magnitude
402
and the tune line
406
intersect at points
408
and
410
. The point
410
represents the tune point at which the power reflec

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