Method of forming gate in semiconductor device

Details Method of forming gate in semiconductor device Method of forming gate in semiconductor device

1999-12-27

2001-04-17

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S301000, C438S307000, C438S586000, C438S592000, C438S656000, C438S704000

Reexamination Certificate

active

06218252

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a method of forming a gate in a semiconductor device, and more particularly to a method of forming a gate in a semiconductor device which is capable of preventing a degradation in the property of the device due to an oxidation of a refractory metal used as a gate electrode in a heat treatment process under an oxidation atmosphere that is carried out for the purpose of an improvement in a film quality of a gate oxide film.
2. Description of the Prior Art
Generally, for a gate electrode in a semiconductor device, doped polysilicon is most often used.
The gate electrode using such a polysilicon is advantageous in that it provides a process stability. Such a gate electrode, however, is problematic in an improvement in the operating speed of the device owing to a high resistivity of the polysilicon as the design rule is made smaller.
To resolve such a problem, a method has been proposed in which a refractory metal, such as tungsten, low in resistivity, is used for the gate electrode.
FIG. 1
is a cross-sectional view showing a method of forming a gate in a semiconductor using tungsten as the refractory metal according to the prior art. Referring to
FIG. 1
, the method of forming the gate according to the prior art comprises forming a gate oxide film
22
on a semiconductor device
21
to a desired thickness. A tungsten film
26
for a gate electrode is deposited on the resultant structure.
Then, a mask insulation film
27
is formed on the tungsten film
26
. At this time, the mask insulation film
27
is formed by a chemical vapor deposition (hereinafter, called “CVD”).
After forming a photoresist pattern (not shown) on the mask insulation film
27
, the photoresist pattern is exposed to light using a gate electrode mask (not shown) and then developed to form a photoresist film pattern (not shown). Then, using the photoresist film pattern as a mask, the mask insulation film
27
and the tungsten film
26
are patterned to form a gate electrode.
Thereafter, in order to improve a film quality of the gate oxide
22
damaged during the patterning process and to form an oxide film to be used in an LDD ion implantation process, the resultant structure is heat-treated under an oxidation atmosphere.
Afterwards, a lightly-doped impurity junction region (not shown) is formed on the semiconductor substrate
21
using the gate electrode as a mask.
After that, the insulation film spacers (not shown) are formed on side walls of the gate electrode.
Subsequently, using the gate electrode and the insulation film spacers as masks, a heavily-doped impurity junction region is formed, thereby forming an LDD structure.
The method of forming the gate electrode as shown in
FIG. 1
has an advantage of being a simple process. However, where the tungsten film is exposed in the thermal oxidation process to oxidize the tungsten film, a tungsten oxide film (WO
3
) that is a volatile material, is formed causing the shape of the gate electrode to be broken.
Since the gate electrode having the broken shape has an effect on the subsequent process such as an ion implantation process or a thin film deposition, the desired properties of the device cannot be obtained.
To resolve such a disadvantage, an “Wet Hydrogen Oxidation” process has been proposed by N. Yamamoto, et al., in Journal of Electrochemical Society, Vol. 133, p.401 (1986). However, this process must involve an oxidation process at a high temperature, such as about 1,000° C., for a lengthy period of time in order to obtain the necessary thickness of the oxide film. This results in a great degree of deterioration in the thermal property of a 4 GIGA memory device in which a metal gate electrode will be used.
In addition, carrying out the heat treatment under a nitrogen atmosphere to avoid the thermal property deterioration causes a significant problem compared to the case of carrying out the heat treatment under the oxygen atmosphere.
SUMMARY OF THE INVENTION
It is therefore an objective to provide a method of forming a gate in a semiconductor device, capable of preventing a deterioration in the property of a gate electrode formed of a refractory metal in a heat treatment for improving the film quality of a gate oxide film damaged at a patterning process of the gate electrode and for forming an oxide film to be used at an LDD ion implantation, thereby allowing the semiconductor device to have a highly integrated degree.
In accordance with a first example of the invention, a method for forming a gate in a semiconductor device comprises steps of: sequentially forming a gate insulation film, a TiN film, a doped silicon layer and a refractory metal film for a gate electrode on a semiconductor substrate;
etching the refractory metal film and the doped silicone layer using a gate electrode mask to form the gate electrode while exposing the TiN film;
implanting lightly-doped impurity ions into the semiconductor substrate using the gate electrode as a mask;
forming spacers comprised a CVD insulation film on side walls of the gate electrode, respectively;
wet-etching the TiN film in such a manner that only a
10
portion of the TiN film disposed beneath the gate electrode between the spacers remains; and
implanting heavily-doped impurity ions into the semiconductor substrate using the gate electrode and the spacers as a mask to form an impurity junction region of a LDD structure.
In accordance with a second example of the invention, a method for forming a gate in a semiconductor device comprises steps of: forming sequentially a gate insulating film, a TiN film by a physical vapor deposition (hereinafter, called “PVD”), a doped silicone layer for an etch-preventing film, a diffusion barrier film, a refractory metal film for a gate electrode and a first CVD insulation film on a semiconductor substrate; etching the first CVD insulation film, the refractory metal film, the diffusion barrier film, and the doped silicone layer using a gate electrode mask to form the gate electrode while exposing the TiN film; implanting lightly-doped impurity ions into the semiconductor substrate using the gate electrode as a mask; forming spacers formed of a second CVD insulation film on side walls of the gate electrode, respectively; wet-etching the TiN film in such a manner that only a portion of the TiN film disposed beneath the gate electrode between the spacers remains; and implanting heavily-doped impurity ions into the semiconductor substrate using the gate electrode and the spacers as a mask to form an impurity junction region of an LDD structure.


REFERENCES:
patent: 5071788 (1991-12-01), Joshi
patent: 5599725 (1997-02-01), Dorleans et al.
patent: 5783478 (1998-07-01), Chau et al.
patent: 6091120 (2000-07-01), Yeom et al.
patent: 0697714A1 (1996-02-01), None
patent: 2247349A (1992-02-01), None
patent: 363042173A (1988-02-01), None

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